Title: A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions
Abstract: Double-Gate tunnel FET devices, which uses high- κ gate dielectric, are explored using realistic design parameters, showing an ON-current as high as 0.23 mA, a gate voltage of 1.8 V, an OFF-current of not more than 1 fA (neglecting gate leakage), an improved ordinary subthreshold swing of 57 mV/dec, and a lower point slope of 11 mV/dec. A dual material control gate tunnel field effect transistor for an asymmetric doping at source and drain regions is suggested. The gate consists of three segments with different work functions φ 1 , φ 2 , and φ 3 , which are named as tunnelling gate (M 1 ), control gate (M 2 ), and auxiliary gate (M 3 ), individually. The 2-D nature of tunnel FET current flow is studied, which indicates that the current is not confined to a channel at the gate-dielectric surface. When temperature is varied, tunnel FETs with a high- κ gate dielectric have a smaller threshold voltage shift than those using SiO 2 , while the subthreshold slope for fixed values of V g remains nearly unchanged, in contrast with the traditional MOSFET. Moreover, an I on /I off ratio of greater than 2 ×10 11 is shown for simulated device with a gate length (over the intrinsic region) of 50 nm, which indicates that the tunnel FET is encouraging candidate to achieve better-than-ITRS low-standby-power switch activity. Keywords: Band-to-band tunneling, double gate (DG), gated p-i-n diode, high- κ dielectric, subthreshold swing, tunnel field effect transistor (FET) Cite this Article Pratiksha Kharat. A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions. Journal of VLSI Design Tools & Technology . 2018; 8(3): 45–53p.
Publication Year: 2018
Publication Date: 2018-12-26
Language: en
Type: article
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