Title: Tunneling through multi-layer gate dielectrics - an analytical model
Abstract: We propose an analytical direct-tunneling model for multilayer gate dielectrics. This model predicts the amount of gate leakage current as a function of equivalent oxide thickness of the gate dielectric stack and the composition of the stack. This simple model is a useful tool in the development of future CMOS gate dielectric stacks.
Publication Year: 2003
Publication Date: 2003-06-25
Language: en
Type: article
Indexed In: ['crossref']
Access and Citation
Cited By Count: 3
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