Publication Information

{'id': 'https://openalex.org/W3142548232', 'doi': 'https://doi.org/10.1109/aspdac.2011.5722292', 'title': 'An RTL-to-GDS2 design methodology for advanced system LSI', 'display_name': 'An RTL-to-GDS2 design methodology for advanced system LSI', 'publication_year': 2011, 'publication_date': '2011-01-01', 'ids': {'openalex': 'https://openalex.org/W3142548232', 'doi': 'https://doi.org/10.1109/aspdac.2011.5722292', 'mag': '3142548232'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/aspdac.2011.5722292', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4363608500', 'display_name': '2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5057068098', 'display_name': 'Nobuyuki Nishiguchi', 'orcid': None}, 'institutions': [{'id': 'https://openalex.org/I4210125918', 'display_name': 'Semiconductor Energy Laboratory (Japan)', 'ror': 'https://ror.org/02vszc135', 'country_code': 'JP', 'type': 'company', 'lineage': ['https://openalex.org/I4210125918']}], 'countries': ['JP'], 'is_corresponding': True, 'raw_author_name': 'Nobuyuki Nishiguchi', 'raw_affiliation_strings': ['Semiconductor Technology Academic Research Center, Japan'], 'affiliations': [{'raw_affiliation_string': 'Semiconductor Technology Academic Research Center, Japan', 'institution_ids': ['https://openalex.org/I4210125918']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': ['https://openalex.org/A5057068098'], 'corresponding_institution_ids': ['https://openalex.org/I4210125918'], 'apc_list': None, 'apc_paid': None, 'fwci': 0.0, 'has_fulltext': False, 'cited_by_count': 0, 'citation_normalized_percentile': {'value': 0.0, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 0, 'max': 65}, 'biblio': {'volume': None, 'issue': None, 'first_page': '770', 'last_page': '774'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T10904', 'display_name': 'Embedded Systems Design Techniques', 'score': 0.9987, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T10904', 'display_name': 'Embedded Systems Design Techniques', 'score': 0.9987, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11527', 'display_name': '3D IC and TSV technologies', 'score': 0.9966, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T10829', 'display_name': 'Interconnection Networks and Systems', 'score': 0.9955, 'subfield': {'id': 'https://openalex.org/subfields/1705', 'display_name': 'Computer Networks and Communications'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/design-methods', 'display_name': 'Design methods', 'score': 0.64380485}, {'id': 'https://openalex.org/keywords/integrated-circuit-design', 'display_name': 'Integrated circuit design', 'score': 0.5953515}], 'concepts': [{'id': 'https://openalex.org/C62064638', 'wikidata': 'https://www.wikidata.org/wiki/Q553878', 'display_name': 'Design for manufacturability', 'level': 2, 'score': 0.7991005}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.6561403}, {'id': 'https://openalex.org/C138852830', 'wikidata': 'https://www.wikidata.org/wiki/Q2292993', 'display_name': 'Design methods', 'level': 2, 'score': 0.64380485}, {'id': 'https://openalex.org/C26517878', 'wikidata': 'https://www.wikidata.org/wiki/Q228039', 'display_name': 'Key (lock)', 'level': 2, 'score': 0.6396129}, {'id': 'https://openalex.org/C74524168', 'wikidata': 'https://www.wikidata.org/wiki/Q1074539', 'display_name': 'Integrated circuit design', 'level': 2, 'score': 0.5953515}, {'id': 'https://openalex.org/C200601418', 'wikidata': 'https://www.wikidata.org/wiki/Q2193887', 'display_name': 'Reliability engineering', 'level': 1, 'score': 0.4875924}, {'id': 'https://openalex.org/C118524514', 'wikidata': 'https://www.wikidata.org/wiki/Q173212', 'display_name': 'Computer architecture', 'level': 1, 'score': 0.46624961}, {'id': 'https://openalex.org/C201995342', 'wikidata': 'https://www.wikidata.org/wiki/Q682496', 'display_name': 'Systems engineering', 'level': 1, 'score': 0.43923828}, {'id': 'https://openalex.org/C106246047', 'wikidata': 'https://www.wikidata.org/wiki/Q4928435', 'display_name': 'Iterative design', 'level': 3, 'score': 0.43128312}, {'id': 'https://openalex.org/C77495112', 'wikidata': 'https://www.wikidata.org/wiki/Q5358436', 'display_name': 'Electronic system-level design and verification', 'level': 2, 'score': 0.42721796}, {'id': 'https://openalex.org/C149635348', 'wikidata': 'https://www.wikidata.org/wiki/Q193040', 'display_name': 'Embedded system', 'level': 1, 'score': 0.33903623}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.2232866}, {'id': 'https://openalex.org/C111919701', 'wikidata': 'https://www.wikidata.org/wiki/Q9135', 'display_name': 'Operating system', 'level': 1, 'score': 0.07565728}, {'id': 'https://openalex.org/C78519656', 'wikidata': 'https://www.wikidata.org/wiki/Q101333', 'display_name': 'Mechanical engineering', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C2778648169', 'wikidata': 'https://www.wikidata.org/wiki/Q967768', 'display_name': 'Compatibility (geochemistry)', 'level': 2, 'score': 0.0}, {'id': 'https://openalex.org/C42360764', 'wikidata': 'https://www.wikidata.org/wiki/Q83588', 'display_name': 'Chemical engineering', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/aspdac.2011.5722292', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4363608500', 'display_name': '2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [{'score': 0.42, 'id': 'https://metadata.un.org/sdg/9', 'display_name': 'Industry, innovation and infrastructure'}], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 1, 'referenced_works': ['https://openalex.org/W3151751772'], 'related_works': ['https://openalex.org/W4246351405', 'https://openalex.org/W3021581891', 'https://openalex.org/W2549099758', 'https://openalex.org/W2545489593', 'https://openalex.org/W2388589331', 'https://openalex.org/W2366713167', 'https://openalex.org/W2291870163', 'https://openalex.org/W2095646370', 'https://openalex.org/W1970762549', 'https://openalex.org/W1569991298'], 'abstract_inverted_index': {'STARC': [0], 'is': [1], 'developing': [2], 'an': [3], 'RTL-to-GDS2': [4], 'design': [5, 16, 28, 30, 36, 50, 64], 'methodology': [6, 17, 65], 'for': [7, 31], '32nm': [8], '(and': [9], '28nm)': [10], 'system': [11], 'LSIs': [12], 'called': [13], 'STARCAD-CEL.': [14], 'The': [15], 'focuses': [18], 'on': [19], 'four': [20, 70], 'key': [21, 71], 'areas:': [22], 'low': [23], 'power': [24], 'design,': [25], 'variation': [26], 'aware': [27], 'and': [29], 'manufacturability': [32], 'as': [33, 35], 'well': [34], 'productivity.': [37], 'This': [38], 'paper': [39], 'examines': [40], 'several': [41], 'techniques': [42], 'we': [43], 'used': [44], 'to': [45, 68], 'solve': [46], 'issues': [47], 'the': [48, 59, 62, 69], 'in': [49], 'of': [51, 61], 'challenging,': [52], 'leading': [53], 'edge': [54], 'devices.': [55], 'It': [56], 'also': [57], 'describes': [58], 'effectiveness': [60], 'STARCAD-CEL': [63], 'when': [66], 'applied': [67], 'areas.': [72]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W3142548232', 'counts_by_year': [], 'updated_date': '2024-12-10T16:17:44.472209', 'created_date': '2021-04-13'}