Title: An Embedded 10-bit 2 MHz Successive Approximation ADC
Abstract: An embedded 10-bit 2 MS/s successive approximation analog-to-digital converter(ADC) is presented.In order to achieve high accuracy,the DAC is implemented by using Voltage Scaling for MBSs and Charge Scaling for LSBs,comparator offset is minimized by using both input and output offset calibration technique.The ADC core is fabricated in TSMC 0.18 μm 1P6M CMOS process.The core die size of 0.9×0.6 mm2 is achieved.Testing results show that it achieves an ENOB of 8.51 bit,a maximum DNL of-0.8~+0.7 LSB,a maximum INL of-1.7~+1.5 LSB for a 180 kHz input signal at full sampling rate.The total power consumption of the ADC core is only 1.2mW.
Publication Year: 2011
Publication Date: 2011-01-01
Language: en
Type: article
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