Publication Information

{'id': 'https://openalex.org/W2162551450', 'doi': 'https://doi.org/10.1109/iccs.2008.4737427', 'title': 'A low spurious and small step frequency synthesizer based on PLL-DDS-PLL architecture', 'display_name': 'A low spurious and small step frequency synthesizer based on PLL-DDS-PLL architecture', 'publication_year': 2008, 'publication_date': '2008-11-01', 'ids': {'openalex': 'https://openalex.org/W2162551450', 'doi': 'https://doi.org/10.1109/iccs.2008.4737427', 'mag': '2162551450'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/iccs.2008.4737427', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5100695235', 'display_name': 'Meng Hu', 'orcid': 'https://orcid.org/0009-0004-6149-0821'}, 'institutions': [{'id': 'https://openalex.org/I150229711', 'display_name': 'University of Electronic Science and Technology of China', 'ror': 'https://ror.org/04qr3zq92', 'country_code': 'CN', 'type': 'education', 'lineage': ['https://openalex.org/I150229711']}], 'countries': ['CN'], 'is_corresponding': False, 'raw_author_name': 'None Meng Hu', 'raw_affiliation_strings': ['School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China'], 'affiliations': [{'raw_affiliation_string': 'School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China', 'institution_ids': ['https://openalex.org/I150229711']}]}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5067621763', 'display_name': 'Ling Wang', 'orcid': 'https://orcid.org/0000-0003-1226-2801'}, 'institutions': [{'id': 'https://openalex.org/I150229711', 'display_name': 'University of Electronic Science and Technology of China', 'ror': 'https://ror.org/04qr3zq92', 'country_code': 'CN', 'type': 'education', 'lineage': ['https://openalex.org/I150229711']}], 'countries': ['CN'], 'is_corresponding': False, 'raw_author_name': 'None Ling Wang', 'raw_affiliation_strings': ['School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China'], 'affiliations': [{'raw_affiliation_string': 'School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China', 'institution_ids': ['https://openalex.org/I150229711']}]}, {'author_position': 'last', 'author': {'id': 'https://openalex.org/A5101416867', 'display_name': 'Xiaohong Tang', 'orcid': 'https://orcid.org/0000-0002-1793-7778'}, 'institutions': [{'id': 'https://openalex.org/I150229711', 'display_name': 'University of Electronic Science and Technology of China', 'ror': 'https://ror.org/04qr3zq92', 'country_code': 'CN', 'type': 'education', 'lineage': ['https://openalex.org/I150229711']}], 'countries': ['CN'], 'is_corresponding': False, 'raw_author_name': 'None Xiaohong Tang', 'raw_affiliation_strings': ['School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China'], 'affiliations': [{'raw_affiliation_string': 'School of Electronic Engineering, University of Electronic Science and Technology, Chengdu, Sichuan, China', 'institution_ids': ['https://openalex.org/I150229711']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': [], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.801, 'has_fulltext': True, 'fulltext_origin': 'ngrams', 'cited_by_count': 8, 'citation_normalized_percentile': {'value': 0.814545, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 82, 'max': 83}, 'biblio': {'volume': None, 'issue': None, 'first_page': '1471', 'last_page': '1474'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T11417', 'display_name': 'Advancements in PLL and VCO Technologies', 'score': 0.9998, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T11417', 'display_name': 'Advancements in PLL and VCO Technologies', 'score': 0.9998, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11697', 'display_name': 'Numerical Methods and Algorithms', 'score': 0.9995, 'subfield': {'id': 'https://openalex.org/subfields/1703', 'display_name': 'Computational Theory and Mathematics'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11034', 'display_name': 'Digital Filter Design and Implementation', 'score': 0.9961, 'subfield': {'id': 'https://openalex.org/subfields/1711', 'display_name': 'Signal Processing'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/pll-multibit', 'display_name': 'PLL multibit', 'score': 0.8844614}, {'id': 'https://openalex.org/keywords/dbc', 'display_name': 'dBc', 'score': 0.8817184}, {'id': 'https://openalex.org/keywords/direct-digital-synthesizer', 'display_name': 'Direct digital synthesizer', 'score': 0.8033968}, {'id': 'https://openalex.org/keywords/spurious-relationship', 'display_name': 'Spurious relationship', 'score': 0.68894804}], 'concepts': [{'id': 'https://openalex.org/C12707504', 'wikidata': 'https://www.wikidata.org/wiki/Q52637', 'display_name': 'Phase-locked loop', 'level': 3, 'score': 0.94512784}, {'id': 'https://openalex.org/C77881186', 'wikidata': 'https://www.wikidata.org/wiki/Q7119642', 'display_name': 'PLL multibit', 'level': 4, 'score': 0.8844614}, {'id': 'https://openalex.org/C193523891', 'wikidata': 'https://www.wikidata.org/wiki/Q1771950', 'display_name': 'dBc', 'level': 3, 'score': 0.8817184}, {'id': 'https://openalex.org/C166089067', 'wikidata': 'https://www.wikidata.org/wiki/Q1227465', 'display_name': 'Direct digital synthesizer', 'level': 5, 'score': 0.8033968}, {'id': 'https://openalex.org/C182099602', 'wikidata': 'https://www.wikidata.org/wiki/Q2660678', 'display_name': 'Frequency synthesizer', 'level': 4, 'score': 0.77613914}, {'id': 'https://openalex.org/C97256817', 'wikidata': 'https://www.wikidata.org/wiki/Q1462316', 'display_name': 'Spurious relationship', 'level': 2, 'score': 0.68894804}, {'id': 'https://openalex.org/C89631360', 'wikidata': 'https://www.wikidata.org/wiki/Q1428766', 'display_name': 'Phase noise', 'level': 2, 'score': 0.6683355}, {'id': 'https://openalex.org/C188414643', 'wikidata': 'https://www.wikidata.org/wiki/Q3001183', 'display_name': 'Harmonics', 'level': 3, 'score': 0.52484393}, {'id': 'https://openalex.org/C24326235', 'wikidata': 'https://www.wikidata.org/wiki/Q126095', 'display_name': 'Electronic engineering', 'level': 1, 'score': 0.51016617}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.43744868}, {'id': 'https://openalex.org/C119599485', 'wikidata': 'https://www.wikidata.org/wiki/Q43035', 'display_name': 'Electrical engineering', 'level': 1, 'score': 0.2830545}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.24962747}, {'id': 'https://openalex.org/C165801399', 'wikidata': 'https://www.wikidata.org/wiki/Q25428', 'display_name': 'Voltage', 'level': 2, 'score': 0.13987014}, {'id': 'https://openalex.org/C119857082', 'wikidata': 'https://www.wikidata.org/wiki/Q2539', 'display_name': 'Machine learning', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/iccs.2008.4737427', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [{'score': 0.53, 'display_name': 'Affordable and clean energy', 'id': 'https://metadata.un.org/sdg/7'}], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 12, 'referenced_works': ['https://openalex.org/W1784300417', 'https://openalex.org/W1795611506', 'https://openalex.org/W1945198048', 'https://openalex.org/W1957414750', 'https://openalex.org/W1966053493', 'https://openalex.org/W1975545773', 'https://openalex.org/W2112276884', 'https://openalex.org/W2160902476', 'https://openalex.org/W2161536523', 'https://openalex.org/W2161676627', 'https://openalex.org/W2182756325', 'https://openalex.org/W4256164501'], 'related_works': ['https://openalex.org/W3145870900', 'https://openalex.org/W2379961307', 'https://openalex.org/W2374761771', 'https://openalex.org/W2371350995', 'https://openalex.org/W2370071821', 'https://openalex.org/W2359366503', 'https://openalex.org/W2354027044', 'https://openalex.org/W2353586717', 'https://openalex.org/W2350523680', 'https://openalex.org/W2162551450'], 'abstract_inverted_index': {'This': [0], 'paper': [1], 'describes': [2], 'a': [3], 'low': [4, 83], 'spurious': [5, 52, 80], 'and': [6, 47, 108], 'small': [7], 'step': [8, 98], 'frequency': [9, 90, 97], 'synthesizer': [10, 65], 'module': [11, 32, 55, 76], 'based': [12], 'on': [13], 'PLL': [14, 39, 45], '(Phase-Locked': [15], 'Loop)-DDS': [16], '(Direct': [17], 'Digital': [18], 'Synthesis)-PLL': [19], 'structure,': [20], 'which': [21], 'is': [22, 56, 81, 92], 'controlled': [23], 'by': [24], 'the': [25, 29, 37, 41, 43, 48, 74, 79, 96, 102, 109], 'parallel': [26], 'port': [27], 'of': [28, 34, 53, 73], 'computer.': [30], 'The': [31, 51, 70], 'consists': [33], 'four': [35], 'parts:': [36], 'first': [38], '(PLL1),': [40], 'DDS,': [42], 'second': [44], '(PLL2)': [46], 'control': [49], 'part.': [50], 'this': [54], 'ameliorated': [57], 'to': [58], 'some': [59], 'extent': [60], 'in': [61], 'comparison': [62], 'with': [63], 'traditional': [64], 'technologies': [66], 'using': [67], 'single': [68], 'PLL.': [69], 'experimental': [71], 'measurement': [72], 'actual': [75], 'shows': [77], 'that': [78], 'as': [82, 84], '-65': [85], 'dBc.': [86, 112], 'In': [87], 'addition,': [88], 'its': [89], 'range': [91], '2060': [93], 'MHz-2160': [94], 'MHz,': [95], 'size': [99], '10': [100], 'kHz,': [101], 'phase': [103], 'noise': [104], '-90': [105], 'dBC/Hz@10': [106], 'kHz': [107], 'harmonics': [110], '-40': [111]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2162551450', 'counts_by_year': [{'year': 2021, 'cited_by_count': 1}, {'year': 2017, 'cited_by_count': 1}, {'year': 2016, 'cited_by_count': 1}, {'year': 2015, 'cited_by_count': 1}, {'year': 2013, 'cited_by_count': 2}], 'updated_date': '2024-12-11T15:27:38.233524', 'created_date': '2016-06-24'}