Publication Information

{'id': 'https://openalex.org/W2370071821', 'doi': None, 'title': 'Design of Wideband Frequency Synthesizer Based on DDS-Driven PLL', 'display_name': 'Design of Wideband Frequency Synthesizer Based on DDS-Driven PLL', 'publication_year': 2009, 'publication_date': '2009-01-01', 'ids': {'openalex': 'https://openalex.org/W2370071821', 'mag': '2370071821'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://en.cnki.com.cn/Article_en/CJFDTOTAL-XDDJ200905028.htm', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2764664148', 'display_name': 'Modern Electronics Technique', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': 'https://openalex.org/P4320800568', 'host_organization_name': 'Chinese Institute of Electronics', 'host_organization_lineage': ['https://openalex.org/P4320800568'], 'host_organization_lineage_names': ['Chinese Institute of Electronics'], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'journal-article', 'indexed_in': [], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5007045924', 'display_name': 'Dong Lifang', 'orcid': None}, 'institutions': [], 'countries': ['CN'], 'is_corresponding': True, 'raw_author_name': 'Dong Lifang', 'raw_affiliation_strings': ['Technology of China,Chengdu,610054,China)'], 'affiliations': [{'raw_affiliation_string': 'Technology of China,Chengdu,610054,China)', 'institution_ids': []}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 0, 'corresponding_author_ids': ['https://openalex.org/A5007045924'], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.0, 'has_fulltext': False, 'cited_by_count': 0, 'citation_normalized_percentile': {'value': 0.0, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 0, 'max': 64}, 'biblio': {'volume': None, 'issue': None, 'first_page': None, 'last_page': None}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T13734', 'display_name': 'Advanced Computational Techniques and Applications', 'score': 0.9962, 'subfield': {'id': 'https://openalex.org/subfields/1702', 'display_name': 'Artificial Intelligence'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T13734', 'display_name': 'Advanced Computational Techniques and Applications', 'score': 0.9962, 'subfield': {'id': 'https://openalex.org/subfields/1702', 'display_name': 'Artificial Intelligence'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T13717', 'display_name': 'Advanced Algorithms and Applications', 'score': 0.9419, 'subfield': {'id': 'https://openalex.org/subfields/2207', 'display_name': 'Control and Systems Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T12941', 'display_name': 'Embedded Systems and FPGA Design', 'score': 0.9374, 'subfield': {'id': 'https://openalex.org/subfields/2207', 'display_name': 'Control and Systems Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/dbc', 'display_name': 'dBc', 'score': 0.930172}, {'id': 'https://openalex.org/keywords/direct-digital-synthesizer', 'display_name': 'Direct digital synthesizer', 'score': 0.91298294}, {'id': 'https://openalex.org/keywords/spurious-free-dynamic-range', 'display_name': 'Spurious-free dynamic range', 'score': 0.8363162}, {'id': 'https://openalex.org/keywords/wideband', 'display_name': 'Wideband', 'score': 0.7194737}, {'id': 'https://openalex.org/keywords/pll-multibit', 'display_name': 'PLL multibit', 'score': 0.6722857}, {'id': 'https://openalex.org/keywords/spurious-relationship', 'display_name': 'Spurious relationship', 'score': 0.62692595}], 'concepts': [{'id': 'https://openalex.org/C193523891', 'wikidata': 'https://www.wikidata.org/wiki/Q1771950', 'display_name': 'dBc', 'level': 3, 'score': 0.930172}, {'id': 'https://openalex.org/C166089067', 'wikidata': 'https://www.wikidata.org/wiki/Q1227465', 'display_name': 'Direct digital synthesizer', 'level': 5, 'score': 0.91298294}, {'id': 'https://openalex.org/C12707504', 'wikidata': 'https://www.wikidata.org/wiki/Q52637', 'display_name': 'Phase-locked loop', 'level': 3, 'score': 0.8661008}, {'id': 'https://openalex.org/C119293636', 'wikidata': 'https://www.wikidata.org/wiki/Q657480', 'display_name': 'Spurious-free dynamic range', 'level': 3, 'score': 0.8363162}, {'id': 'https://openalex.org/C182099602', 'wikidata': 'https://www.wikidata.org/wiki/Q2660678', 'display_name': 'Frequency synthesizer', 'level': 4, 'score': 0.8145641}, {'id': 'https://openalex.org/C89631360', 'wikidata': 'https://www.wikidata.org/wiki/Q1428766', 'display_name': 'Phase noise', 'level': 2, 'score': 0.74694234}, {'id': 'https://openalex.org/C2780202535', 'wikidata': 'https://www.wikidata.org/wiki/Q4524457', 'display_name': 'Wideband', 'level': 2, 'score': 0.7194737}, {'id': 'https://openalex.org/C77881186', 'wikidata': 'https://www.wikidata.org/wiki/Q7119642', 'display_name': 'PLL multibit', 'level': 4, 'score': 0.6722857}, {'id': 'https://openalex.org/C97256817', 'wikidata': 'https://www.wikidata.org/wiki/Q1462316', 'display_name': 'Spurious relationship', 'level': 2, 'score': 0.62692595}, {'id': 'https://openalex.org/C24326235', 'wikidata': 'https://www.wikidata.org/wiki/Q126095', 'display_name': 'Electronic engineering', 'level': 1, 'score': 0.54215246}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.38148236}, {'id': 'https://openalex.org/C119599485', 'wikidata': 'https://www.wikidata.org/wiki/Q43035', 'display_name': 'Electrical engineering', 'level': 1, 'score': 0.3224116}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.2675296}, {'id': 'https://openalex.org/C87133666', 'wikidata': 'https://www.wikidata.org/wiki/Q1161699', 'display_name': 'Dynamic range', 'level': 2, 'score': 0.19134599}, {'id': 'https://openalex.org/C119857082', 'wikidata': 'https://www.wikidata.org/wiki/Q2539', 'display_name': 'Machine learning', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://en.cnki.com.cn/Article_en/CJFDTOTAL-XDDJ200905028.htm', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2764664148', 'display_name': 'Modern Electronics Technique', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': 'https://openalex.org/P4320800568', 'host_organization_name': 'Chinese Institute of Electronics', 'host_organization_lineage': ['https://openalex.org/P4320800568'], 'host_organization_lineage_names': ['Chinese Institute of Electronics'], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 0, 'referenced_works': [], 'related_works': ['https://openalex.org/W3145870900', 'https://openalex.org/W2888521225', 'https://openalex.org/W2391166013', 'https://openalex.org/W2388744842', 'https://openalex.org/W2387915062', 'https://openalex.org/W2383142473', 'https://openalex.org/W2379408459', 'https://openalex.org/W2378730351', 'https://openalex.org/W2371350995', 'https://openalex.org/W2370714826', 'https://openalex.org/W2357707916', 'https://openalex.org/W2355382277', 'https://openalex.org/W2353586717', 'https://openalex.org/W2350049513', 'https://openalex.org/W2290422758', 'https://openalex.org/W2162551450', 'https://openalex.org/W2078452748', 'https://openalex.org/W2063650506', 'https://openalex.org/W2011064899', 'https://openalex.org/W2004433520'], 'abstract_inverted_index': {'By': [0], 'taking': [1], 'advantages': [2], 'of': [3], 'the': [4, 30, 34, 42], 'Direct': [5], 'Digital': [6], 'Synthesizer(DDS)': [7], 'and': [8, 23, 33], 'Phase': [9], 'Locked': [10], 'Loop(PLL),a': [11], 'low': [12], 'spurious,wide': [13], 'band,high': [14], 'resolution': [15], 'triple': [16], 'tuned': [17], 'type': [18], 'frequency': [19, 53], 'synthesizer': [20], 'with': [21], 'AD9954': [22], 'ADF4113': [24], 'is': [25], 'designed.The': [26], 'results': [27, 36], 'which': [28], 'are': [29], 'simulated': [31], 'data': [32], 'measured': [35], 'on': [37], 'finished': [38], 'product': [39], 'indicate': [40], 'that': [41], 'technology': [43], 'can': [44], 'obtain': [45], 'its': [46], 'goal.Its': [47], 'specifications': [48], 'show': [49], 'as': [50], 'following:': [51], 'output': [52], 'range': [54], '594~999': [55], 'MHz,step': [56], '5': [57], 'Hz,phase': [58], 'noise-91': [59], 'dBc/Hz@10': [60], 'kHz,SFDR-73': [61], 'dBc,hopping': [62], 'time': [63], '520': [64], 'μs.': [65]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2370071821', 'counts_by_year': [], 'updated_date': '2024-12-09T02:13:47.205380', 'created_date': '2016-06-24'}