Abstract: VHDL is a language used to describe digital circuits. It is a powerful language, originally intended for simulation, but is now being applied to synthesis. Descriptions of digital hardware in VHDL can be described in terms of structure, behavior, or a mixture of the two description styles.
Publication Year: 2002
Publication Date: 2002-12-30
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 2
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