Publication Information

{'id': 'https://openalex.org/W1863704131', 'doi': 'https://doi.org/10.5573/jsts.2015.15.2.208', 'title': 'Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains', 'display_name': 'Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains', 'publication_year': 2015, 'publication_date': '2015-04-30', 'ids': {'openalex': 'https://openalex.org/W1863704131', 'doi': 'https://doi.org/10.5573/jsts.2015.15.2.208', 'mag': '1863704131'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.5573/jsts.2015.15.2.208', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2482218150', 'display_name': 'JSTS Journal of Semiconductor Technology and Science', 'issn_l': '1598-1657', 'issn': ['1598-1657', '2233-4866'], 'is_oa': False, 'is_in_doaj': False, 'is_core': True, 'host_organization': 'https://openalex.org/P4366305964', 'host_organization_name': 'Institute of Electronics Engineers of Korea', 'host_organization_lineage': ['https://openalex.org/P4366305964'], 'host_organization_lineage_names': ['Institute of Electronics Engineers of Korea'], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'journal-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5045883735', 'display_name': 'Sung-Gun Song', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Sung-Gun Song', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5051102387', 'display_name': 'Seongmo Park', 'orcid': 'https://orcid.org/0000-0001-8656-9094'}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Seong-Mo Park', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5006775135', 'display_name': 'Jeong‐Gun Lee', 'orcid': 'https://orcid.org/0000-0001-6218-4560'}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Jeong-Gun Lee', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'last', 'author': {'id': 'https://openalex.org/A5016097144', 'display_name': 'Myeong‐Hoon Oh', 'orcid': 'https://orcid.org/0000-0002-6019-1422'}, 'institutions': [{'id': 'https://openalex.org/I142401562', 'display_name': 'Electronics and Telecommunications Research Institute', 'ror': 'https://ror.org/03ysstz10', 'country_code': 'KR', 'type': 'facility', 'lineage': ['https://openalex.org/I142401562']}], 'countries': ['KR'], 'is_corresponding': False, 'raw_author_name': 'Myeong-Hoon Oh', 'raw_affiliation_strings': ['Electronics and Telecommunications, Research Institute#TAB#'], 'affiliations': [{'raw_affiliation_string': 'Electronics and Telecommunications, Research Institute#TAB#', 'institution_ids': ['https://openalex.org/I142401562']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': [], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.294, 'has_fulltext': False, 'cited_by_count': 1, 'citation_normalized_percentile': {'value': 0.557724, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 66, 'max': 73}, 'biblio': {'volume': '15', 'issue': '2', 'first_page': '208', 'last_page': '222'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T10829', 'display_name': 'Interconnection Networks and Systems', 'score': 0.9999, 'subfield': {'id': 'https://openalex.org/subfields/1705', 'display_name': 'Computer Networks and Communications'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T10829', 'display_name': 'Interconnection Networks and Systems', 'score': 0.9999, 'subfield': {'id': 'https://openalex.org/subfields/1705', 'display_name': 'Computer Networks and Communications'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11032', 'display_name': 'VLSI and Analog Circuit Testing', 'score': 0.9997, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T10904', 'display_name': 'Embedded Systems Design Techniques', 'score': 0.9996, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/synchronizer', 'display_name': 'Synchronizer', 'score': 0.9430053}, {'id': 'https://openalex.org/keywords/self-clocking-signal', 'display_name': 'Self-clocking signal', 'score': 0.5434274}, {'id': 'https://openalex.org/keywords/static-timing-analysis', 'display_name': 'Static timing analysis', 'score': 0.522511}, {'id': 'https://openalex.org/keywords/clock-domain-crossing', 'display_name': 'Clock domain crossing', 'score': 0.48789808}, {'id': 'https://openalex.org/keywords/clock-drift', 'display_name': 'Clock drift', 'score': 0.4664492}], 'concepts': [{'id': 'https://openalex.org/C66727535', 'wikidata': 'https://www.wikidata.org/wiki/Q7662199', 'display_name': 'Synchronizer', 'level': 2, 'score': 0.9430053}, {'id': 'https://openalex.org/C129891060', 'wikidata': 'https://www.wikidata.org/wiki/Q1513059', 'display_name': 'Clock synchronization', 'level': 4, 'score': 0.78459656}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.6716521}, {'id': 'https://openalex.org/C2778562939', 'wikidata': 'https://www.wikidata.org/wiki/Q1298791', 'display_name': 'Synchronization (alternating current)', 'level': 3, 'score': 0.650862}, {'id': 'https://openalex.org/C82876162', 'wikidata': 'https://www.wikidata.org/wiki/Q17096504', 'display_name': 'Latency (audio)', 'level': 2, 'score': 0.5587601}, {'id': 'https://openalex.org/C171051901', 'wikidata': 'https://www.wikidata.org/wiki/Q2389679', 'display_name': 'Self-clocking signal', 'level': 5, 'score': 0.5434274}, {'id': 'https://openalex.org/C93682380', 'wikidata': 'https://www.wikidata.org/wiki/Q2025226', 'display_name': 'Static timing analysis', 'level': 2, 'score': 0.522511}, {'id': 'https://openalex.org/C79403827', 'wikidata': 'https://www.wikidata.org/wiki/Q3988', 'display_name': 'Real-time computing', 'level': 1, 'score': 0.50925076}, {'id': 'https://openalex.org/C127204226', 'wikidata': 'https://www.wikidata.org/wiki/Q5134799', 'display_name': 'Clock domain crossing', 'level': 5, 'score': 0.48789808}, {'id': 'https://openalex.org/C155837451', 'wikidata': 'https://www.wikidata.org/wiki/Q1069144', 'display_name': 'Clock drift', 'level': 5, 'score': 0.4664492}, {'id': 'https://openalex.org/C2779960059', 'wikidata': 'https://www.wikidata.org/wiki/Q7113681', 'display_name': 'Overhead (engineering)', 'level': 2, 'score': 0.41125426}, {'id': 'https://openalex.org/C60501442', 'wikidata': 'https://www.wikidata.org/wiki/Q4382014', 'display_name': 'Clock skew', 'level': 4, 'score': 0.35612404}, {'id': 'https://openalex.org/C149635348', 'wikidata': 'https://www.wikidata.org/wiki/Q193040', 'display_name': 'Embedded system', 'level': 1, 'score': 0.3042736}, {'id': 'https://openalex.org/C127162648', 'wikidata': 'https://www.wikidata.org/wiki/Q16858953', 'display_name': 'Channel (broadcasting)', 'level': 2, 'score': 0.25151217}, {'id': 'https://openalex.org/C42196554', 'wikidata': 'https://www.wikidata.org/wiki/Q1186179', 'display_name': 'Synchronous circuit', 'level': 4, 'score': 0.16204783}, {'id': 'https://openalex.org/C137059387', 'wikidata': 'https://www.wikidata.org/wiki/Q426882', 'display_name': 'Clock signal', 'level': 3, 'score': 0.1142765}, {'id': 'https://openalex.org/C120314980', 'wikidata': 'https://www.wikidata.org/wiki/Q180634', 'display_name': 'Distributed computing', 'level': 1, 'score': 0.1084283}, {'id': 'https://openalex.org/C31258907', 'wikidata': 'https://www.wikidata.org/wiki/Q1301371', 'display_name': 'Computer network', 'level': 1, 'score': 0.08833331}, {'id': 'https://openalex.org/C76155785', 'wikidata': 'https://www.wikidata.org/wiki/Q418', 'display_name': 'Telecommunications', 'level': 1, 'score': 0.07382965}, {'id': 'https://openalex.org/C134652429', 'wikidata': 'https://www.wikidata.org/wiki/Q1052698', 'display_name': 'Jitter', 'level': 2, 'score': 0.0}, {'id': 'https://openalex.org/C111919701', 'wikidata': 'https://www.wikidata.org/wiki/Q9135', 'display_name': 'Operating system', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.5573/jsts.2015.15.2.208', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2482218150', 'display_name': 'JSTS Journal of Semiconductor Technology and Science', 'issn_l': '1598-1657', 'issn': ['1598-1657', '2233-4866'], 'is_oa': False, 'is_in_doaj': False, 'is_core': True, 'host_organization': 'https://openalex.org/P4366305964', 'host_organization_name': 'Institute of Electronics Engineers of Korea', 'host_organization_lineage': ['https://openalex.org/P4366305964'], 'host_organization_lineage_names': ['Institute of Electronics Engineers of Korea'], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 27, 'referenced_works': ['https://openalex.org/W102595597', 'https://openalex.org/W1484915143', 'https://openalex.org/W1579939990', 'https://openalex.org/W1671801012', 'https://openalex.org/W2027638276', 'https://openalex.org/W2037181413', 'https://openalex.org/W2043583636', 'https://openalex.org/W2056167301', 'https://openalex.org/W2062952706', 'https://openalex.org/W2066183107', 'https://openalex.org/W2085176118', 'https://openalex.org/W2108367269', 'https://openalex.org/W2111207983', 'https://openalex.org/W2120480196', 'https://openalex.org/W2127614267', 'https://openalex.org/W2128492880', 'https://openalex.org/W2129981070', 'https://openalex.org/W2134157563', 'https://openalex.org/W2139349254', 'https://openalex.org/W2139356211', 'https://openalex.org/W2141242940', 'https://openalex.org/W2142843191', 'https://openalex.org/W2152753377', 'https://openalex.org/W2163835931', 'https://openalex.org/W2167873583', 'https://openalex.org/W2199316920', 'https://openalex.org/W2212079180'], 'related_works': ['https://openalex.org/W4387123206', 'https://openalex.org/W3202150569', 'https://openalex.org/W2554968816', 'https://openalex.org/W2551458511', 'https://openalex.org/W2411759562', 'https://openalex.org/W2292909929', 'https://openalex.org/W2246178160', 'https://openalex.org/W2109520798', 'https://openalex.org/W2056489071', 'https://openalex.org/W1842357617'], 'abstract_inverted_index': {'For': [0], 'the': [1, 70, 79, 86, 91, 94, 109, 115, 119, 126, 138, 144], 'performance-efficient': [2], 'integration': [3], 'of': [4, 35, 45, 93, 114], 'IPs': [5], 'on': [6], 'an': [7], 'SoC': [8], 'utilizing': [9], 'heterochronous': [10], 'multi-clock': [11], 'domains,': [12], 'we': [13, 107], 'propose': [14], 'a': [15, 36, 40, 46, 51, 58, 76, 101, 130, 134], 'synchronization': [16, 31, 65, 72, 88, 135], 'scheme': [17, 32, 96], 'that': [18, 54, 125], 'causes': [19], 'low': [20], 'latency': [21], 'overhead': [22], 'when': [23], 'data': [24, 141], 'are': [25, 74], 'crossing': [26], 'clock': [27, 37, 43, 48, 53, 60, 116, 127, 132], 'boundaries.': [28], 'The': [29, 42, 121], 'proposed': [30, 95], 'is': [33, 55], 'composed': [34], 'predictor': [38, 44, 117, 128], 'and': [39, 111, 118, 137], 'synchronizer.': [41, 120], 'sender': [47], 'domain': [49, 61], 'produces': [50, 129], 'predicted': [52, 131, 145], 'used': [56], 'in': [57, 67], 'receiver': [59, 80], 'to': [62, 84], 'detect': [63], 'possible': [64, 71, 87], 'failures': [66, 73], 'advance.': [68], 'When': [69], 'detected,': [75], 'synchronizer': [77, 139], 'at': [78], 'delays': [81], 'data-capture': [82], 'times': [83], 'avoid': [85], 'failures.': [89], 'From': [90], 'simulation': [92, 122], 'through': [97], 'SPICE': [98], 'modeling': [99], 'using': [100, 143], 'Chartered': [102], '0.18': [103], 'mm': [104], 'CMOS': [105], 'process,': [106], 'verified': [108], 'functionalities': [110], 'timing': [112], 'behavior': [113], 'results': [123], 'show': [124], 'before': [133], 'failure,': [136], 'samples': [140], 'correctly': [142], 'clock.': [146]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W1863704131', 'counts_by_year': [{'year': 2017, 'cited_by_count': 1}], 'updated_date': '2024-12-07T16:38:14.291215', 'created_date': '2016-06-24'}