Publication Information

{'id': 'https://openalex.org/W2392957778', 'doi': None, 'title': 'Design of PLL Frequency Synthesizer by Single-chip Microcomputer', 'display_name': 'Design of PLL Frequency Synthesizer by Single-chip Microcomputer', 'publication_year': 1999, 'publication_date': '1999-01-01', 'ids': {'openalex': 'https://openalex.org/W2392957778', 'mag': '2392957778'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://en.cnki.com.cn/Article_en/CJFDTOTAL-DBDL902.015.htm', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2764868679', 'display_name': 'Journal of Northeast China Institute of Electric Power Engineering', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'journal-article', 'indexed_in': [], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5110377282', 'display_name': 'Sun Zeng', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': True, 'raw_author_name': 'Sun Zeng', 'raw_affiliation_strings': ['you,LI Jian  qi'], 'affiliations': [{'raw_affiliation_string': 'you,LI Jian  qi', 'institution_ids': []}]}], 'institution_assertions': [], 'countries_distinct_count': 0, 'institutions_distinct_count': 0, 'corresponding_author_ids': ['https://openalex.org/A5110377282'], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.0, 'has_fulltext': False, 'cited_by_count': 0, 'citation_normalized_percentile': {'value': 0.0, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 0, 'max': 56}, 'biblio': {'volume': None, 'issue': None, 'first_page': None, 'last_page': None}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T13734', 'display_name': 'Advanced Computational Techniques and Applications', 'score': 0.9865, 'subfield': {'id': 'https://openalex.org/subfields/1702', 'display_name': 'Artificial Intelligence'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T13734', 'display_name': 'Advanced Computational Techniques and Applications', 'score': 0.9865, 'subfield': {'id': 'https://openalex.org/subfields/1702', 'display_name': 'Artificial Intelligence'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11417', 'display_name': 'Advancements in PLL and VCO Technologies', 'score': 0.9414, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T12941', 'display_name': 'Embedded Systems and FPGA Design', 'score': 0.9332, 'subfield': {'id': 'https://openalex.org/subfields/2207', 'display_name': 'Control and Systems Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/microcomputer', 'display_name': 'Micro computer', 'score': 0.76047075}, {'id': 'https://openalex.org/keywords/pll-multibit', 'display_name': 'PLL multibit', 'score': 0.5799395}, {'id': 'https://openalex.org/keywords/direct-digital-synthesizer', 'display_name': 'Direct digital synthesizer', 'score': 0.47765267}], 'concepts': [{'id': 'https://openalex.org/C12707504', 'wikidata': 'https://www.wikidata.org/wiki/Q52637', 'display_name': 'Phase-locked loop', 'level': 3, 'score': 0.87481904}, {'id': 'https://openalex.org/C182099602', 'wikidata': 'https://www.wikidata.org/wiki/Q2660678', 'display_name': 'Frequency synthesizer', 'level': 4, 'score': 0.83299863}, {'id': 'https://openalex.org/C132090242', 'wikidata': 'https://www.wikidata.org/wiki/Q32738', 'display_name': 'Microcomputer', 'level': 3, 'score': 0.76047075}, {'id': 'https://openalex.org/C165005293', 'wikidata': 'https://www.wikidata.org/wiki/Q1074500', 'display_name': 'Chip', 'level': 2, 'score': 0.5799539}, {'id': 'https://openalex.org/C77881186', 'wikidata': 'https://www.wikidata.org/wiki/Q7119642', 'display_name': 'PLL multibit', 'level': 4, 'score': 0.5799395}, {'id': 'https://openalex.org/C24326235', 'wikidata': 'https://www.wikidata.org/wiki/Q126095', 'display_name': 'Electronic engineering', 'level': 1, 'score': 0.5262895}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.51635134}, {'id': 'https://openalex.org/C166089067', 'wikidata': 'https://www.wikidata.org/wiki/Q1227465', 'display_name': 'Direct digital synthesizer', 'level': 5, 'score': 0.47765267}, {'id': 'https://openalex.org/C9390403', 'wikidata': 'https://www.wikidata.org/wiki/Q3966', 'display_name': 'Computer hardware', 'level': 1, 'score': 0.43508378}, {'id': 'https://openalex.org/C2780586882', 'wikidata': 'https://www.wikidata.org/wiki/Q7520643', 'display_name': 'Simple (philosophy)', 'level': 2, 'score': 0.42576075}, {'id': 'https://openalex.org/C26517878', 'wikidata': 'https://www.wikidata.org/wiki/Q228039', 'display_name': 'Key (lock)', 'level': 2, 'score': 0.41561487}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.36821955}, {'id': 'https://openalex.org/C119599485', 'wikidata': 'https://www.wikidata.org/wiki/Q43035', 'display_name': 'Electrical engineering', 'level': 1, 'score': 0.29826656}, {'id': 'https://openalex.org/C89631360', 'wikidata': 'https://www.wikidata.org/wiki/Q1428766', 'display_name': 'Phase noise', 'level': 2, 'score': 0.12921095}, {'id': 'https://openalex.org/C138885662', 'wikidata': 'https://www.wikidata.org/wiki/Q5891', 'display_name': 'Philosophy', 'level': 0, 'score': 0.0}, {'id': 'https://openalex.org/C38652104', 'wikidata': 'https://www.wikidata.org/wiki/Q3510521', 'display_name': 'Computer security', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C111472728', 'wikidata': 'https://www.wikidata.org/wiki/Q9471', 'display_name': 'Epistemology', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://en.cnki.com.cn/Article_en/CJFDTOTAL-DBDL902.015.htm', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S2764868679', 'display_name': 'Journal of Northeast China Institute of Electric Power Engineering', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'journal'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 0, 'referenced_works': [], 'related_works': ['https://openalex.org/W2862937977', 'https://openalex.org/W2844083754', 'https://openalex.org/W2387803289', 'https://openalex.org/W2387796711', 'https://openalex.org/W2376731877', 'https://openalex.org/W2375072050', 'https://openalex.org/W2374702664', 'https://openalex.org/W2370944718', 'https://openalex.org/W2369039419', 'https://openalex.org/W2365884037', 'https://openalex.org/W2360886438', 'https://openalex.org/W2359264549', 'https://openalex.org/W2358488697', 'https://openalex.org/W2357707916', 'https://openalex.org/W2350471500', 'https://openalex.org/W2350242303', 'https://openalex.org/W2148768617', 'https://openalex.org/W2117349133', 'https://openalex.org/W2007713861', 'https://openalex.org/W1491579352'], 'abstract_inverted_index': {'A': [0], 'new': [1], 'advanced': [2], 'method': [3, 27, 81], 'to': [4], 'constitute': [5], 'a': [6], 'multiple': [7], 'point': [8], 'frequency': [9, 16, 40, 58], 'synthesizer': [10, 46, 65], 'by': [11, 19], 'using': [12], 'large': [13, 37], 'scale': [14, 38], 'PLL': [15, 39], 'IC': [17, 41], 'controlled': [18], 'single': [20, 74], 'chipmicrocomputer': [21], 'is': [22, 28], 'presented.The': [23], 'design': [24, 80], 'on': [25], 'this': [26, 60], 'not': [29], 'only': [30], 'full': [31], 'used': [32], 'the': [33, 36, 45, 64, 70], 'functions': [34], 'of': [35, 73, 82], 'but': [42], 'also': [43], 'that': [44], 'has': [47], 'many': [48], 'specialities': [49], 'such': [50], 'as': [51], 'simple': [52], 'structure,convenient': [53], 'operation': [54], 'and': [55, 66, 79], 'nigh': [56], 'stable': [57], 'etc.In': [59], 'paper': [61], 'mainly': [62], 'describes': [63], 'its': [67], 'key': [68], 'circuit,also': [69], 'hardware': [71], 'structure': [72], 'chip': [75], 'microcomputer': [76], 'controlling': [77], 'system': [78], 'software.': [83]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2392957778', 'counts_by_year': [], 'updated_date': '2024-12-08T14:52:55.053245', 'created_date': '2016-06-24'}