Abstract: To solve larger integer multiplication based on CORDIC,the improved measuring method of encoding Z-input on traditional CORDIC algorithm was proposed.The pipeline structure of this CORDIC algorithm and its VHDL code were elucidated.Simulation results were basically in agreement with theoretical value.The improvement on CORDIC algorithm is suitable for FPGA chips to run it.
Publication Year: 2010
Publication Date: 2010-01-01
Language: en
Type: article
Access and Citation
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot