Title: VLSI Architecture of EBCOT Encoder for JPEG2000
Abstract: Proposes a VLSI architecture of EBCOT, in which a Dynamic Memory Control (DMC) is adopted to reduce 60% scale of the on-chip wavelet coefficients storage. A parallel architecture is proposed to speed-up the coding process. This architecture can be used as a compact and efficient IP core for JPEG2000 VLSI implementation and various real-time image/video applications.
Publication Year: 2003
Publication Date: 2003-01-01
Language: en
Type: article
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