Novel Charge Pump Design for Fast Locking Time PLL

Name: Work Video:
Duration: 3 min 30 s
Description: A new architecture of charge pump for lowing locking time of phase locked loop (PLL) is proposed. The new architecture is composed of a no-dead-zone Phase Frequency Detector (PFD), a Frequency to Voltage Converter (FVC), a Voltage to Current Converter (VCC) and some control logics. Based on a 0.25 μm CMOS technology, simulation results show that the locking time of the PLL reduces about 50%.
Shengli Lu
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