Title: Research on Optimization Techniques of DSP Instruction Set Simulator
Abstract: As the importance of the Instruction Set Simulator(ISS) in processor modeling and system software validation and performance evaluation,it has been a key problem to researchers to enhance the performance of the ISS.The Decision Forest,Encoder Cache,Virtual Page Table and some other optimization techniques into general ISS implementations are introduced.The implementation of high-performance and customizable ISS for ZWFCore-ZWISS is proposed.Furthermore,the performance improvement of ZWISS is investigated.
Publication Year: 2011
Publication Date: 2011-01-01
Language: en
Type: article
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