Title: Study on an efficient algorithm for H.263and its implementation with single chip DSP
Abstract: This paper describes the implementation of H.263real-time video codec on TI 's DSP TMS320C62x.This series of DSP utilize the advanced Very Long Instruction Word(VLIW)architecture,which makes them ideal for the high performance multimedia applications.To speed up the codec process,several techniques have been proposed,such as Modified Predictive Motion Estimation method(P-ME),Edge MSE matching criterion and Ze-ro-block Detection0before DCT and Quantization algorithm,which significantly improve the performance of the video coder.In addition,a series of optimizing schemes are presented for it.Now,on the EVM board it can pro-cess20~25frames of CIF(352×288)mode video sequences within a second.Multimedia applications such as consumer set-top boxes,videophones,videoconferencing etc will benefit from its performance.[
Publication Year: 2002
Publication Date: 2002-01-01
Language: en
Type: article
Access and Citation
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot