Title: Influence of the Tunneling Gate Current on C-V Curves
Abstract: This paper presents a study of the tunneling gate current influence on the Capacitance vs. Voltage curve in deep submicrometer CMOS technology. Two-dimensional numerical simulations are performed considering thin gate oxide and N+ polysilicon as a gate material. The influence of the tunneling gate current on the polysilicon depletion region is also analysed. It is observed that the tunneling current masks the polysilicon depletion effect due to the large increase of the substrate silicon depletion region.
Publication Year: 2007
Publication Date: 2007-11-21
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 1
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