Publication Information

{'id': 'https://openalex.org/W2146942794', 'doi': 'https://doi.org/10.1109/mwscas.2004.1354030', 'title': 'A new routing design methodology for multi-chip IC packages', 'display_name': 'A new routing design methodology for multi-chip IC packages', 'publication_year': 2004, 'publication_date': '2004-12-23', 'ids': {'openalex': 'https://openalex.org/W2146942794', 'doi': 'https://doi.org/10.1109/mwscas.2004.1354030', 'mag': '2146942794'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/mwscas.2004.1354030', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5060464308', 'display_name': 'Hideyuki Murata', 'orcid': 'https://orcid.org/0000-0001-8248-9652'}, 'institutions': [{'id': 'https://openalex.org/I17056963', 'display_name': 'The University of Kitakyushu', 'ror': 'https://ror.org/03mfefw72', 'country_code': 'JP', 'type': 'education', 'lineage': ['https://openalex.org/I17056963']}], 'countries': ['JP'], 'is_corresponding': True, 'raw_author_name': 'H. Murata', 'raw_affiliation_strings': ['University of Kitakyushu, Japan#TAB#'], 'affiliations': [{'raw_affiliation_string': 'University of Kitakyushu, Japan#TAB#', 'institution_ids': ['https://openalex.org/I17056963']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': ['https://openalex.org/A5060464308'], 'corresponding_institution_ids': ['https://openalex.org/I17056963'], 'apc_list': None, 'apc_paid': None, 'fwci': 0.182, 'has_fulltext': True, 'fulltext_origin': 'ngrams', 'cited_by_count': 1, 'citation_normalized_percentile': {'value': 0.172228, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 61, 'max': 68}, 'biblio': {'volume': '1', 'issue': None, 'first_page': '1_473', 'last_page': '1_476'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T10996', 'display_name': 'Computational Geometry and Mesh Generation', 'score': 0.999, 'subfield': {'id': 'https://openalex.org/subfields/1704', 'display_name': 'Computer Graphics and Computer-Aided Design'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T10996', 'display_name': 'Computational Geometry and Mesh Generation', 'score': 0.999, 'subfield': {'id': 'https://openalex.org/subfields/1704', 'display_name': 'Computer Graphics and Computer-Aided Design'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T10789', 'display_name': 'Interactive and Immersive Displays', 'score': 0.9984, 'subfield': {'id': 'https://openalex.org/subfields/1709', 'display_name': 'Human-Computer Interaction'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11522', 'display_name': 'VLSI and FPGA Design Techniques', 'score': 0.9968, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/sketch', 'display_name': 'Sketch', 'score': 0.71545076}, {'id': 'https://openalex.org/keywords/network-routing', 'display_name': 'Network routing', 'score': 0.59149903}, {'id': 'https://openalex.org/keywords/design-methods', 'display_name': 'Design methods', 'score': 0.5714217}, {'id': 'https://openalex.org/keywords/electronic-design-automation', 'display_name': 'Electronic design automation', 'score': 0.5577016}, {'id': 'https://openalex.org/keywords/integrated-circuit-design', 'display_name': 'Integrated circuit design', 'score': 0.5287635}], 'concepts': [{'id': 'https://openalex.org/C74172769', 'wikidata': 'https://www.wikidata.org/wiki/Q1446839', 'display_name': 'Routing (electronic design automation)', 'level': 2, 'score': 0.7592069}, {'id': 'https://openalex.org/C2779231336', 'wikidata': 'https://www.wikidata.org/wiki/Q7534724', 'display_name': 'Sketch', 'level': 2, 'score': 0.71545076}, {'id': 'https://openalex.org/C188817802', 'wikidata': 'https://www.wikidata.org/wiki/Q13426855', 'display_name': 'Physical design', 'level': 3, 'score': 0.68575037}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.6214458}, {'id': 'https://openalex.org/C2983435990', 'wikidata': 'https://www.wikidata.org/wiki/Q22725', 'display_name': 'Network routing', 'level': 3, 'score': 0.59149903}, {'id': 'https://openalex.org/C138852830', 'wikidata': 'https://www.wikidata.org/wiki/Q2292993', 'display_name': 'Design methods', 'level': 2, 'score': 0.5714217}, {'id': 'https://openalex.org/C64260653', 'wikidata': 'https://www.wikidata.org/wiki/Q1194864', 'display_name': 'Electronic design automation', 'level': 2, 'score': 0.5577016}, {'id': 'https://openalex.org/C74524168', 'wikidata': 'https://www.wikidata.org/wiki/Q1074539', 'display_name': 'Integrated circuit design', 'level': 2, 'score': 0.5287635}, {'id': 'https://openalex.org/C111335779', 'wikidata': 'https://www.wikidata.org/wiki/Q3454686', 'display_name': 'Reduction (mathematics)', 'level': 2, 'score': 0.45754075}, {'id': 'https://openalex.org/C149635348', 'wikidata': 'https://www.wikidata.org/wiki/Q193040', 'display_name': 'Embedded system', 'level': 1, 'score': 0.40871483}, {'id': 'https://openalex.org/C118524514', 'wikidata': 'https://www.wikidata.org/wiki/Q173212', 'display_name': 'Computer architecture', 'level': 1, 'score': 0.39871576}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.34932113}, {'id': 'https://openalex.org/C190560348', 'wikidata': 'https://www.wikidata.org/wiki/Q3245116', 'display_name': 'Circuit design', 'level': 2, 'score': 0.2946754}, {'id': 'https://openalex.org/C78519656', 'wikidata': 'https://www.wikidata.org/wiki/Q101333', 'display_name': 'Mechanical engineering', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C2524010', 'wikidata': 'https://www.wikidata.org/wiki/Q8087', 'display_name': 'Geometry', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C33923547', 'wikidata': 'https://www.wikidata.org/wiki/Q395', 'display_name': 'Mathematics', 'level': 0, 'score': 0.0}, {'id': 'https://openalex.org/C11413529', 'wikidata': 'https://www.wikidata.org/wiki/Q8366', 'display_name': 'Algorithm', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/mwscas.2004.1354030', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [{'id': 'https://metadata.un.org/sdg/9', 'display_name': 'Industry, innovation and infrastructure', 'score': 0.46}], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 8, 'referenced_works': ['https://openalex.org/W1526377505', 'https://openalex.org/W1961662591', 'https://openalex.org/W1984941987', 'https://openalex.org/W2059078864', 'https://openalex.org/W2072904119', 'https://openalex.org/W2105353235', 'https://openalex.org/W2144193408', 'https://openalex.org/W2149842302'], 'related_works': ['https://openalex.org/W4321510758', 'https://openalex.org/W3205162826', 'https://openalex.org/W3002779172', 'https://openalex.org/W2743305891', 'https://openalex.org/W2610167993', 'https://openalex.org/W2366617252', 'https://openalex.org/W2154454108', 'https://openalex.org/W2146942794', 'https://openalex.org/W2110346573', 'https://openalex.org/W2056740847'], 'abstract_inverted_index': {'This': [0], 'paper': [1], 'presents': [2], 'a': [3, 19, 31, 35, 46, 57, 62, 69], 'new': [4], 'methodology': [5], 'for': [6, 13, 75], 'routing': [7, 60], 'design': [8, 15, 40, 66, 72, 78], 'in': [9], 'multi-chip': [10], 'IC': [11], 'packages': [12], 'reducing': [14], 'time': [16, 73], 'while': [17], 'attaining': [18], 'layer': [20], 'efficiency': [21], 'comparable': [22], 'to': [23, 56], 'hand': [24], 'crafted': [25], 'design.': [26], 'In': [27], 'the': [28, 39, 50], 'proposed': [29], 'methodology,': [30], 'designer': [32], 'interactively': [33], 'develops': [34], 'routable': [36, 52], 'sketch': [37, 53], 'of': [38, 43], 'by': [41], 'means': [42], '"bendable-rats",': [44], 'using': [45, 61], 'tailored': [47], 'tool.': [48], 'Then': [49], 'resultant': [51], 'is': [54], 'converted': [55], 'curvilinear': [58], 'physical': [59], 'rubber-band': [63], 'algorithm.': [64], 'A': [65], 'trial': [67], 'shows': [68], '4.2': [70], 'times': [71], 'reduction': [74], 'an': [76], 'industrial': [77], 'example.': [79]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2146942794', 'counts_by_year': [], 'updated_date': '2024-12-08T09:37:54.370928', 'created_date': '2016-06-24'}