Title: Graph Theoretical Analysis and Design of Multistage Interconnection Networks
Abstract:This paper introduces two graph theoretic models that provide a uniform procedure for analyzing 2n-input/2n-output Multistage Interconnection Networks (MIN's), implemented with 2-input/2-output Switch...This paper introduces two graph theoretic models that provide a uniform procedure for analyzing 2n-input/2n-output Multistage Interconnection Networks (MIN's), implemented with 2-input/2-output Switching Elements (SE's) and satisfying a characteristics called the "buddy property." These models show that all such n-stage MIN's are topologically equivalent and hence prove that one MIN can be implemented from integrated circuits designed for another MIN. The proposed techniques also allow identical modeling and comparison of permutation capabilities of n-stage MIN's and other link-controlled networks like augmented data manipulator and SW Banyan Network and hence, allows comparison of their permutation. In the case of any conflict in the MIN, an upper bound for the required number of passes has been obtained.Read More
Publication Year: 1983
Publication Date: 1983-07-01
Language: en
Type: article
Indexed In: ['crossref']
Access and Citation
Cited By Count: 189
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot