Title: A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters
Abstract: ETRI JournalVolume 24, Issue 5 p. 333-340 Regular PaperFree Access A Novel Process for Fabricating High Density Trench MOSFETs for DC-DC Converters Jongdae Kim, Jongdae KimSearch for more papers by this authorTae Moon Roh, Tae Moon RohSearch for more papers by this authorSang-Gi Kim, Sang-Gi KimSearch for more papers by this authorIl-Yong Park, Il-Yong ParkSearch for more papers by this authorYil Suk Yang, Yil Suk YangSearch for more papers by this authorDae-Woo Lee, Dae-Woo LeeSearch for more papers by this authorJin-Gun Koo, Jin-Gun KooSearch for more papers by this authorKyoung-Ik Cho, Kyoung-Ik ChoSearch for more papers by this authorYoung Il Kang, Young Il KangSearch for more papers by this author Jongdae Kim, Jongdae KimSearch for more papers by this authorTae Moon Roh, Tae Moon RohSearch for more papers by this authorSang-Gi Kim, Sang-Gi KimSearch for more papers by this authorIl-Yong Park, Il-Yong ParkSearch for more papers by this authorYil Suk Yang, Yil Suk YangSearch for more papers by this authorDae-Woo Lee, Dae-Woo LeeSearch for more papers by this authorJin-Gun Koo, Jin-Gun KooSearch for more papers by this authorKyoung-Ik Cho, Kyoung-Ik ChoSearch for more papers by this authorYoung Il Kang, Young Il KangSearch for more papers by this author First published: 01 October 2002 https://doi.org/10.4218/etrij.02.0102.0501Citations: 17 Jongdae Kim (phone: +82 42 860 6410, e-mail: [email protected]), Tae Moon Roh (e-mail: [email protected]), Sang-Gi Kim (e-mail: [email protected]), Il-Yong Park (e-mail: [email protected]), Yil Suk Yang (e-mail: [email protected]), Dae-Woo Lee (e-mail: [email protected]), Jin-Gun Koo (e-mail: [email protected]), Kyoung-Ik Cho (e-mail: [email protected]), and Young Il Kang (e-mail: [email protected]) are with Basic Research Laboratory, ETRI, Daejeon, Korea. AboutPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinked InRedditWechat Abstract We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 µm was 100 Mcell/in2 and a specific on-resistance of 0.41 mΩ·cm2 was obtained under a blocking voltage of 43 V. Citing Literature Volume24, Issue5October 2002Pages 333-340 ReferencesRelatedInformation