Title: VLSI Architectures for the Multiplication of Integers Modulo a Fermat Number
Abstract: Multiplication is central in the implementation of Fermat number transforms and other residue number algorithms. There is need for a good multiplication algorithm that can be realized easily on a very large scale integration (VLSI) chip. The Leibowitz multiplier is modified to realize multiplication in the ring of integers modulo a Fermat number. This new algorithm requires only a sequence of cyclic shifts and additions. The designs developed for this new multiplier are regular, simple, expandable, and, therefore, suitable for VLSI implementation.
Publication Year: 1984
Publication Date: 1984-11-15
Language: en
Type: article
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