Title: Design and Implementation of Half Adder, Full Adder and CMOS Full Adder
Abstract: In this paper, 1 bit full adder is designed in Microwind and DSCH. It is analysed using different implementation methods like AOI logic and using transmission gates. It is converted into an equivalent RC model to make the model simpler but less accurate for calculations. However, accurate results are obtained and verified using DSCH, Verilog code and Mircrowind.