Title: Design of Low-Power Reverse Carry Propagate Adder Using FinFET
Abstract: In the reverse carry propagation adder structure, the carry signal propagates from the MSB to LSB during a counter-flow manner. Hence, the convey input has higher importance than the yield convey. The strategy for carry propagation adder results with high stability with the presence of variations in delay. In the proposed architecture, it is combined with a carry adder to propagate 8-bit reverse carry propagate full adder (RCPFA) to make a hybrid adders with pitch levels precision. The design specifications of the proposed architecture are implemented and compared with the regular approximate adders using H-spice simulation in a 7 nm FINFET technology. In traditional full adder, which is that the basic structure of the convey spread adders has 3 contributors with an identical weight. Also, its two yields for a total outcome with indistinct load as that of the data sources and a pass on yield with twofold the stack. The carry propagate delay (TCP) is that the most essential organizing limit in the pass on full adders has three commitments with an indistinguishable weight.
Publication Year: 2022
Publication Date: 2022-09-14
Language: en
Type: book-chapter
Indexed In: ['crossref']
Access and Citation
Cited By Count: 2
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