Title: A Novel Method of Multiplication with Ekanyunena Purvena
Abstract: In this paper a novel method of multiplication is developed using Ekanyunena Purvena of Indian vedic mathematics. The multiplier designed using present method is applied for BCD(Binary Coded Decial) as well as binary number system. A 4 × 4, 8 × 8 and 16 × 16 bit multiplier is designed using this method and architecture is developed for BCD as well as binary number systems. The performance of this method is compared for area delay and power with array and vedic UT (UrdhvaTiryakbyham) multiplier. The proposed multiplier is implemented with VHDL on spartan3 FPGA board using Xilinx ISE 14.7 and its power dissipation is calculated using XPower analyzer. The performance of proposed multiplier is compared with conventional array multiplier.The simulation results demonstrates the improvement in processing speed as well as power consumption.
Publication Year: 2020
Publication Date: 2020-08-28
Language: en
Type: book-chapter
Indexed In: ['crossref']
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Cited By Count: 1
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