Title: Reed Solomon error correction for the space telescope
Abstract:This paper reports a single 8.2mm by 8.4mm, 200,000 transistor CMOS chip implementation of the Reed Solomon code required by the Space Telescope. The chip features a 10 MHz sustained byte rate indepen...This paper reports a single 8.2mm by 8.4mm, 200,000 transistor CMOS chip implementation of the Reed Solomon code required by the Space Telescope. The chip features a 10 MHz sustained byte rate independent of error pattern. The 1.6 micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes as well as shortened codes are supported with no external buffering. Erasure corrections as well as random error corrections are supported with programmable corrections of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors.Read More
Publication Year: 1990
Publication Date: 1990-01-24
Language: en
Type: article
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