Abstract: IET Microwaves, Antennas & PropagationVolume 14, Issue 10 p. 1021-1026 Research ArticleFree Access Highly efficient wideband parallel-circuit class-E/F3 power amplifier's design methodology Chang Liu, Chang Liu School of Microelectronics, Tianjin University, Tianjin, 300072 People's Republic of China IRadio Laboratory, Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, T2N1N4 AB, CanadaSearch for more papers by this authorQian Lin, Corresponding Author Qian Lin [email protected] College of Physics and Electronic Information Engineer, Qinghai University for Nationalities, Xining, 810007 People's Republic of ChinaSearch for more papers by this authorFadhel M. Ghannouchi, Fadhel M. Ghannouchi IRadio Laboratory, Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, T2N1N4 AB, CanadaSearch for more papers by this author Chang Liu, Chang Liu School of Microelectronics, Tianjin University, Tianjin, 300072 People's Republic of China IRadio Laboratory, Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, T2N1N4 AB, CanadaSearch for more papers by this authorQian Lin, Corresponding Author Qian Lin [email protected] College of Physics and Electronic Information Engineer, Qinghai University for Nationalities, Xining, 810007 People's Republic of ChinaSearch for more papers by this authorFadhel M. Ghannouchi, Fadhel M. Ghannouchi IRadio Laboratory, Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, T2N1N4 AB, CanadaSearch for more papers by this author First published: 21 May 2020 https://doi.org/10.1049/iet-map.2019.0887Citations: 4AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract This article proposes a simple method of designing a highly efficient wideband parallel-circuit (PC) class-E/F3 power amplifiers (PAs). A combination of the double-reactance compensation technique and fundamental as well as third-harmonic series-tuned resonators is used for the design of the PC class-E/F3 PA output matching network. The step-by-step design flow and corresponding equations to calculate each component's value are also presented. Based on this method, the simulated optimal impedances of the reactance compensation network present almost a constant over the desired band, which satisfies the requirement of the wideband performance. Measured results reveal that using a GaN high electron mobility transistor (HEMT), the fabricated PA demonstrates the measured drain efficiencies of 60.1–80.5%, as well as output powers of 36.0–40.9 dBm from 350 to 730 MHz (fractional bandwidth = 70.4%). 1 Introduction The rapid development of the fifth-generation and future wireless communication networks needs to address the demand for higher efficiency, so as to make it more reliable and more attractive for consumers [[1]]. In terms of efficiency, it is predominantly determined by the power amplifier (PA), which is the critical power consumption component in the mobile communication system [[2]]. With recent trends, it is becoming urgent to develop design methodology and amplifier's architectures for broadband and high-efficiency PAs [[3]–[19]]. Due to the advantages of a simple topology and a great harmonic suppression, the high-efficiency class-E PA [[3]] has been widely used in modern transmitter architectures [[4]]. However, there are still some drawbacks in class-E PAs, such as high peak drain voltage (Vmax) and low output power capability (cp) [[5]]. Recently, to address these issues, many kinds of mix-mode high-efficiency PAs [[6]–[9]] have been reported by adding the harmonic tuning techniques to class-E PAs. For instance, a single-ended class-E/F2 amplifier using a finite DC feed inductor is presented in [[6]], where the cp, the maximum operating frequency (fmax) and the load resistance R are improved by making a proper selection of resonance parameters α and β. In [[9]], the author proposed a parallel-circuit (PC) class-E/F PA to further improve the performance in Vmax, fmax and cp without dramatically increasing the circuit complexity. However, the reported mix-mode PAs [[6]–[9]] are only designed to work in a narrow frequency band, which cannot satisfy the bandwidth requirements of future communication systems [[10]]. As well, the mentioned PAs also cannot be implemented in multimode and multiband applications [[11]]. In this paper, for the sake of broadening the bandwidth of the mix-mode PAs, a simple method of combining the double-reactance compensation technique with fundamental and third-harmonic series-tuned resonators is proposed first. By using this technique, the optimal impedances are almost constant over a wideband. Thus, the derived circuit not only keeps the excellent performance of PC class-E/F3 mix-mode PAs, but also significantly extends the frequency bandwidth. The rest of this paper is organised as follows. Section 2 presents the design strategies of the high-efficiency broadband PC class-E/F3 PAs. In Section 3, the proposed circuit is specifically designed and fabricated with a GaN transistor. Moreover, it is tested with a continuous-wave signal in order to verify its feasibility. Finally, conclusions are drawn in Section 4. 2 Design strategies The proposed circuit schematic is illustrated in Fig. 1. At the drain node of the device, a reactance compensation network is added, so that the optimal impedances can be maintained almost a constant across a wideband. Besides, the circuit also needs a broadband output matching network (OMN) for the sake of matching the optimal fundamental impedance with 50 Ω. Similarly, at the gate node, a broadband input matching network (IMN) is required. Fig. 1Open in figure viewerPowerPoint Proposed circuit schematic of the highly efficient wideband PC class-E/F3 PA The novel reactance compensation network is described in Fig. 2. It is made up of a parallel inductance Lp, a shunt capacitance Cp, an L3C3 series resonator tuned at third harmonic, an L0C0 series resonant network tuned at fundamental, as well as a load resistance R. Among them, the values of Lp, Cp, R can be calculated from [[9]]. Fig. 2Open in figure viewerPowerPoint Circuit schematic of the reactance compensation network In Fig. 2, the reactance Bopt(ω) of the optimal load impedance Zopt(ω) at the switch terminal can be written by (1) Here, ω is the angular frequency. To broaden the design frequency bandwidth, a double-reactance compensation condition [[12]] needs to be satisfied: the first derivatives and second derivatives of Bopt(ω) at the centre angular frequency should be zero: (2) (3) According to (1)–(3) can be simplified as: (4) (5) Based on (4) and (5), C0 and C3 can be obtained: (6) (7) Moreover, the series-tuned circuit L0C0 and the shunt resonator L3C3 need to be resonated at ω0 and 3ω0 [[9]]: (8) (9) Here, ω0 is the centre angular frequency. According to (4)–(7), the values of L0 and L3 can be obtained: (10) (11) For harmonics like 2f0 and 3f0, compared with the ideal narrowband class-E/F3 PAs [[8]], the quality factors of L3C3 and L0C0 are on purpose decreased such that they can provide harmonic impedances across a wideband. In the broadband IMN and OMN, a Chebyshev low-pass structure [[13]] is used to match the optimal impedances obtained from load pull and source pull with the 50 Ω system impedance over a wideband. For example, the resistive component of the frequency-varying impedance at the drain node and gate node is around 56 and 14 Ω. Thus, the impedance transformation ratios are 25 : 28 and 25 : 7. Besides, for the sake of obtaining a complex-to-real transformer, an inductor is added to the matching network. Finally, a computer-aided design optimisation with the actual transistor model is employed in order to achieve the maximum output power and efficiency simultaneously. 3 Design and verification In this section, a wideband PC class-E/F3 PA is designed and fabricated in order to verify the feasibility of the proposed circuit. A 10 W GaN HEMT transistor (CGH40010F) is used. Its output capacitance Cout is 1.2 pF. The device is biased at a drain current of 69.7 mA and the gate voltage of −3.0 V. In order to keep high performance, there is an operating frequency limitation for the PC class-E/F3 PAs when designed using an actual device with parasitic output capacitance [[9]]. Based on this fact, the maximum operating frequency of this PC class-E/F3 PA is 740 MHz. Therefore, in the following example, the centre frequency is selected as 550 MHz. The values of R, Lp and Cp can be obtained from [[9]]: (12) (13) (14) The other component values of the reactance compensation network can be calculated using (1)–(5) with the help of MATLAB: L0 = 23.85 nH, C0 = 3.51 pF, L3 = 8.25 nH and C3 = 1.13 pF. In this case, the simulated real impedance and imaginary impedance of Zopt(ω) versus frequency at the switch terminal can be illustrated in Fig. 3. The imaginary component is almost a constant across 450–700 MHz, while the real component is very flat within ±6% variation, range from 400 to 650 MHz. Thus, a very small variation of the impedance can be obtained, and the flat output power and efficiency can be achieved over a wideband. Fig. 3Open in figure viewerPowerPoint Simulated real impedance and imaginary impedance of Zopt versus frequency The effect of the parasitic capacitance Cout is taken into account when calculating the value of Cp, therefore, the required external shunt capacitance C ( = Cp − Cout) is only 0.42 pF, which is realised by an open-circuit stub. In addition, two Chebyshev low-pass impedance transformers with 80% fractional bandwidth are applied to the broadband IMN and OMN, respectively. Due to the limitation of quality factor (Q) of capacitors and inductors at the desired band, the final IMN and OMN are implemented with distributed elements. For example, the series inductors and the parallel capacitors are substituted by series transmission lines and open-circuit stubs, respectively. Figs. 4a–c show the simulated results of intrinsic current and voltage waveforms of the broadband PC class-E/F3 PA at the drain node. The stimulated signals are continuous waves at 500, 550 and 600 MHz. From Fig. 4, it can be clearly seen that the simulated results are very close to the ideal current and voltage waveforms of the PC class-E/F3 amplifiers [[9]]. Fig. 4Open in figure viewerPowerPoint De-embedded intrinsic drain current and voltage waveforms (a) At 500 MHz, (b) At 550 MHz, (c) At 600 MHz The specifically full circuit schematic of the proposed PC E/F3 amplifiers is illustrated in Fig. 5a. The circuit is realised by making a connection between the transistor and OMN. In order to make the PA stable, in low frequencies, a 100 Ω resistor R2 is added to the gate biasing line; in high frequencies, a 2.3 pF capacitance in shunt with a 30 Ω resistor is employed. The PA is realised on a Rogers 5880 substrate. Its dielectric permittivity and thickness are 2.2 and 31 ml, respectively. Fig. 5b shows the photo of the fabricated circuit of the presented broadband PC class-E/F3 PAs. Fig. 5Open in figure viewerPowerPoint Proposed highly efficient wideband PC class-E/F3 amplifiers (a) Circuit schematic, (b) Photograph In Fig. 6, the measured and simulated S-parameters of the fabricated wideband PC class-E/F3 PA are depicted. A vector network analyser from Rohde & Schwarz is adopted. In the bandwidth of 350–730 MHz, the average value of the small-signal gain (S21) is about 16.6 dB. Fig. 6Open in figure viewerPowerPoint Measured and simulated S-parameters of the broadband class-E/F3 PA Fig. 7 depicts the measured results from 300 to 800 MHz, such as output power, gain, drain efficiencies (DE) and peak power-added efficiencies (PAE), with a constant input power (Pin) of 28 dBm. The designed PA produces a superior performance of better than 60% DE from 350 to 730 MHz. For this design, a fractional bandwidth (FBW) of =70.4% was achieved which largely surpasses the FBW of 9% obtained in the original PC E/F3 PA [[9]]. As well, over the frequency band from 400 to 640 MHz (FBW = 46.2%), the circuit can achieve better than 70% DE. This result validates the broadband characteristic of the reactance compensation network, as shown in Fig. 3. The 1 and 3 dB bandwidths are 160 MHz (FBW = 30.2%) and 250 MHz (FBW = 46.7%), respectively. Fig. 7Open in figure viewerPowerPoint Measured results, in terms of gain, output power, DE and PAE versus frequency from 300 to 800 MHz Figs. 8a–c demonstrate output powers (Pout) of 40.9, 40.8, 39.9 dBm with DE of 77.2, 78.8 and 80.1, PAE of 74.9, 76.6 and 77.2%, power gains of 12.9, 12.8 and 11.9 dB at 500, 550 and 600 MHz, respectively. Fig. 8Open in figure viewerPowerPoint Measured gain, output power, PAE and DE versus input power (a) At 500 MHz, (b) At 550 MHz, (c) At 600 MHz In Table 1, it is summarised that a performance comparison of published efficient broadband PAs using the same device [[7]–[9], [14]–[19]] along with the design presented in this paper is shown. In this case, the ‘friendliness’ of this device will not be a significant factor and every DB PA can be treated equally. Due to the effectiveness of the proposed matching network structure, this PA shows excellent performance among the reported PAs, especially from the bandwidth perspective. Table 1. Comparison with kinds of state-of-the-art PAs Work Frequency, MHz Bandwidth, % Pout, W DE, % Class [[7]] 1820–2280 22.4 37.3–40.3 58.0–91.0 EF3 1420–1720 19.1 40.0–41.9 65.0–85.0 EF5 [[8]] 2000–2360 16.5 37.5–40.6 60.0–85.7 E/F3 [[9]] 2540–2780 9.0 38.4–40.5 60.0–83.9 PC E/F3 [[14]] 1400–2400 52.6 39.8–40.3 63.0–68.9 J [[15]] 1350–2500 60.0 41.0–42.5 68.0–82.0 CCF−1 [[16]] 550–950 53.0 >40.0 >70.0 CCF [[17]] 1400–2700 63.0 39.7–41.5 63.0–73.0 E [[18]] 1240–2420 64.5 37.0–39.9 70–86 X [[19]] 2200–2800 24.0 41.0–43.0 65.9–79.7 BJF−1 this work 350–730 70.4 36.0–40.9 60.1–80.5 PC E/F3 4 Conclusion In this paper, a simple design approach for a highly efficient wideband PC class-E/F3 PA is proposed. It is realised by a combination of the double-reactance compensation technique along with a fundamental and the third-harmonic series-tuned resonators to realise the OMN of PC class-E/F3 PAs. Based on this method, the optimal impedances are found to be almost a constant across the target frequency leading to the substantial bandwidth. The proposed PA would be a good choice for realising high-efficiency broadband power amplification for broadband communication systems. 5 Acknowledgments This work was supported in part by the National Key R&D Plan under contract 2016YFA0202200, in part by the AoShan Talents OS (outstanding scientist) Program Supported by Qingdao National Laboratory for Marine Science and Technology under grant no. 2017ASTCP-OS03, in part by the National Natural Science Foundation (6184110), in part by the Applied Basic Research Plan of Qinghai (2017-ZJ-753), in part by the high-level talent program of Qinghai University for Nationalities (2017XJG04) and in part by the China Scholarship Council. 6 References [1]Popovic, Z.: ‘Amping up, the PA for 5G: efficient GaN power amplifiers with dynamic supplies’, IEEE Microw. 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