Title: Review on topology‐based dc short‐circuit fault ride‐through strategies for MMC‐based HVDC system
Abstract: IET Power ElectronicsVolume 13, Issue 2 p. 203-220 Review ArticleFree Access Review on topology-based dc short-circuit fault ride-through strategies for MMC-based HVDC system Yihao Wan, Yihao Wan State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorMingxuan Mao, Corresponding Author Mingxuan Mao [email protected] State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of China Postdoctoral Station of Electrical Engineering, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorLin Zhou, Lin Zhou State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorXinze Xi, Xinze Xi State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of China Electric Power Research Institute of Yunnan Power Grid Co. Ltd., Kunming, 650217 People's Republic of ChinaSearch for more papers by this authorBao Xie, Bao Xie State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorSiyu Zhou, Siyu Zhou State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this author Yihao Wan, Yihao Wan State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorMingxuan Mao, Corresponding Author Mingxuan Mao [email protected] State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of China Postdoctoral Station of Electrical Engineering, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorLin Zhou, Lin Zhou State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorXinze Xi, Xinze Xi State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of China Electric Power Research Institute of Yunnan Power Grid Co. Ltd., Kunming, 650217 People's Republic of ChinaSearch for more papers by this authorBao Xie, Bao Xie State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this authorSiyu Zhou, Siyu Zhou State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, 400044 People's Republic of ChinaSearch for more papers by this author First published: 01 February 2020 https://doi.org/10.1049/iet-pel.2019.0607Citations: 5AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract Modular multilevel converter (MMC) based high-voltage direct-current (HVDC) transmission system is a promising solution to the bulk power transmission over a long distance, especially for renewable energy integration. However, conventional half-bridge submodules MMC topology is susceptible to dc faults. In this study, dc short-circuit fault analysis and a review on recent advances in clearing dc fault current utilising different topologies are presented. Furthermore, the MMC can also work as a static synchronous compensator, producing reactive power to support the grid and improving the stability of the system when dc fault occurs. Finally, the comparison for different topologies in terms of device cost, estimated power losses, dc fault ride-through capability, and reactive power compensation capability is given. 1 Introduction The past few decades have witnessed a rapid development of high-voltage direct-current (HVDC) transmission, especially the application in renewable energy integration, such as offshore wind farm, dc collector grid for photovoltaic parks, etc. With the modular multilevel converter (MMC) proposed by the Germany professor Marquardt [1], numerous researches on MMC-based HVDC system are inspired. Compared with conventional two-level and three-level voltage source converter (VSC)-HVDC systems, the MMC-based HVDC system is superior due to its low harmonic, low dv/dt, low switching loss, modularity and scalability [2, 3]. Currently, MMC is wildly applied in medium-voltage and high-voltage (HV) power system [4, 5]. Fig. 1 shows a typical half-bridge submodule (HBSM) MMC. In the structure, a phase unit consists of two arms, where the dc system is connected to the upper (P) and lower (N) arm in each phase. Besides, a three-phase ac system is connected to the middle point of each phase (a, b, c). However, when dc short-circuit fault occurs, the MMC will be blocked and the freewheeling diodes have to withstand inrush current. The fault current cannot be cleared due to the unipolar voltage output characteristics of HBSM. Thus, the converter will be damaged if no proper protection schemes are employed. During the fault operation, different components contribute to the fault current in different stages, which will be elaborated in the following sections. Therefore, the protection for the MMC against dc short-circuit faults is essential for the functionality of the MMC-based system [6-8]. Fig. 1Open in figure viewerPowerPoint Topology of standard half-bridge MMC Generally, dc short-circuit faults in MMC-HVDC overhead transmission system can be divided into two types: pole-to-pole (PTP) fault and pole-to-ground (PTG) fault [9-12]. When PTG fault occurs, the PTG voltage of the healthy pole would be increased to twice the rated value and the phase-to-ground voltages in the ac side would get offset, causing a severe offset voltage between neutral point and ground [13, 14]. For the high impedance grounding system on dc side and unearthed dc systems, PTG fault will not cause significant overcurrent but expose dc cables and converter transformers to dc voltage stresses [15]. However, due to the low impedance of the dc system, the PTP fault will make the fault penetration to be much faster and much greater depth. Due to freewheeling effect, inrush current will flow through the antiparallel diodes connected with switching devices and may damage the converter [11, 16]. In other MMC-HVDC systems like the asymmetrical monopole configuration and the bipolar configuration, the PTG fault is considered as PTP fault in the symmetrical monopolar configuration [17-19]. Although PTG fault is more likely to occur compared with PTP fault, the PTP fault is more critical in symmetrical monopolar MMC-HVDC system. Therefore, the PTP fault is the most representative dc short-circuit fault in the MMC-based HVDC system and will be the focus of this paper. In order to protect the MMC-based HVDC system from dc short-circuit faults, several protection strategies based on circuit breakers (CBs) are investigated. For the traditional ac CB (ACCB) [17, 20, 21], due to the slow response, the freewheeling diodes in the converters are required to be rated for full prospective short-circuit current during the ACCB operation. Furthermore, the system is shut down and no real or reactive power is exchanged, which will take a considerable long time to recover for the system [22]. By disconnecting the MMC with ac grid, dc CB (DCCB) can also be used to protect the MMC [23-32]. Usually, the DCCB is categorised into mechanical, solid-state and hybrid DCCB. The response of the mechanical DCCB is slow and the inrush current still exists, which may damage the semiconductors [31]. The solid-state DCCB responds fast to faults while the cost and on-state losses of semiconductors in the main current path are significant [33]. To reduce the losses, hybrid DCCBs have been proposed [34]. Hybrid DCCB is the combination of the mechanical switch and semiconductor devices. It can operate with minimum losses under normal operation and protect the system with the solid-state CB in the main semiconductor-based CB at the case of dc faults. However, it has a relatively large footprint, high cost for bulky power transmission and complex control for the coordination between DCCB and MMC [26]. Recently, researchers have focused on the inherent fault ride-through (FRT) capability of MMC by modifying the submodule (SM) [35-39]. The modified SMs can generate reverse voltage to clear the fault current and recover rapidly, as it can prevent or control the ac side contribution to the dc fault current. Furthermore, the modified converters can also work as wave-shaping circuits (WSCs) and control the ac current while riding through dc faults, which improves the stability of the system. Hence, the topology-based protection scheme provides the alternative for complete replacement of expensive CBs. The rest of the paper is organised as follows: Section 2 covers the system characteristic analysis for dc short-circuit fault in different stages. A review of topology-based protection methods is presented in Section 3. To evaluate the performance for different methods, a comprehensive comparison of different protection schemes is made in Section 4. Finally, an overview of different topology-based protection methods is presented in Section 5. 2 PTP fault analysis and reactive power compensation 2.1 PTP fault The dc side fault process of VSC-based HVDC system is divided into three stages [40]. Similarly, in MMC-based HVDC system, the fault response can also be divided into three stages, while the large dc-link capacitors in conventional VSC are replaced with low-value cascaded capacitors. Therefore, the fault analysis is different. In practical application, the MMC would be blocked after the detection of dc side fault. Therefore, analysis of the transient response of dc side fault is based on the blocking of MMC [21, 41-45]. In [15], before the MMC is blocked, the ac current contributes to the dc side. The dominant component of fault current is the dc current in this stage and the sum of three-phase short-circuit current in symmetrical ac system is zero. Therefore, in the following analysis, the ac system is ignored before MMC is blocked. To obtain the complete response of this non-linear circuit, the equivalent circuit and equations under different stages are presented as follows. 2.1.1 Arm capacitor discharging stage (before blocking) In this stage, the SM capacitor discharging current is the dominant component of the fault current. The MMC can still generate the required ac voltage in a short time after fault initiation. Thus, the ac current is still under control. Each phase of the MMC can be represented by the phase capacitor C in series with arm inductor Lg. The resistor Rarm represents the power losses of the arm. Assume that the number of SM in each arm is N and all SM capacitors discharge equally, the circuit in Fig. 2 can be simplified into Fig. 3 with (1)and the dc side is simplified with inductor Ldc and equivalent resistor Rdc. Each phase leg has 2N SMs, only N SM capacitors will discharge while the other SM capacitors are floating. Hence, the equivalent capacitor Cp can be calculated according to the total discharging power (2)where the voltage of SM capacitor UCsm = Udc/N, Udc is the dc link voltage, the equivalent capacitance is obtained as follows: (3)The time-domain formulation of dc fault current can be deduced based on the differential equation [21, 41, 46] (4)where idc(0) is the initial dc current, and θdc = arctan(τdcωdc), τdc = (4Lg + 6Ldc)/(2Rarm + 3Rdc), (5) (6) Fig. 2Open in figure viewerPowerPoint Equivalent circuit of MMC before it is blocked Fig. 3Open in figure viewerPowerPoint Stage I: simplified circuit 2.1.2 Diode freewheeling stage (the initial stage after blocking) When PTP fault occurs, the dc voltage drops to zero rapidly, and the MMC would be blocked. The capacitors in the SMs are bypassed and the discharging stage is terminated. Due to the arm reactor freewheeling through the diodes, ac fault current is also fed from grid irrespective of the unidirectional characteristic of diodes, as is shown in Fig. 4. Fig. 4Open in figure viewerPowerPoint Diode freewheeling stage after MMC is blocked The dc fault current is, therefore, the sum of triple arm current and half of the ac current [42, 44, 46-48]. The dc fault current consists of two parts, which are the zero-input response of Idc0, shown in Fig. 5a, and the three-phase ac source feeding, shown in Fig. 5b. Assume the voltage and the current of each phase are Vxo = Umsin(ωt + φ0) and Ixo0, and the dc side current is Idc0. The dc fault current can be derived as (7) (8)where (9) (10) (11) (12)The fault currents in each arm are expressed as (13)where ixp and ixn are the current of the upper arm and lower arm, ixo (x = a, b, c) is the grid feeding current. Fig. 5Open in figure viewerPowerPoint Fault current components (a) Dc component, (b) Ac feedingcomponent The initial dc component in each arm decays gradually and the ac grid contributes to the increase of the fault current when the MMC is blocked. 2.1.3 Uncontrolled rectifier stage (after blocking) In this stage, the current path is similar to the path in Fig. 4. After the MMC is blocked, the SMs are no longer discharged. The fault current from the ac system is the dominant component. With the gradual decaying of the fault current, there will be a time when the current in each arm hits zero. Due to the unidirectional characteristics of diodes, the converter can be approximated to an uncontrolled rectifier [40, 43, 49], and the arm currents can be expressed as (14)Employing proper protection schemes, the arm current decays to zero and the ac side current stops feeding into the dc side. The system will restart after the fault is cleared. 2.2 Reactive power compensation: static synchronous compensator (STATCOM) operation As is analysed above, when PTP fault occurs at dc side, the SMs are blocked to protect the switching devices while the freewheeling diodes are likely to be damaged. Meanwhile, the operation causes interruption of power transmission, which leads to inequality between the active power input and output of the ac grid. Even worse, the capacitors in the SMs will be charged/discharged excessively due to the unbalanced power. The reactive power compensation during dc fault contributes to transient stability of the system [22]. Therefore, the MMC is expected to clear the fault current rapidly, so that the insulation of dc lines can be restored, and the power transmission can be restarted as soon as possible in the case that dc faults develop to permanent fault [17]. In the meantime, the active power transmission is interrupted or significantly decreased when dc faults occur, and the reactive power compensation is better achieved by the MMC during the fault clearance operation, especially when the stability of the system is required [50-52]. 3 Protection for dc side fault To enable the MMC to ride through PTP fault, different strategies on modifying the MMC topologies have been introduced. 3.1 Enhanced SMs 3.1.1 Modified HBSM Considering the device cost and power losses of additional components, some studies focused on modifying the simplest HBSM to protect the MMC from the fault current. A simple solution is a single-thyristor switch scheme (STSS) [53, 54], shown in Fig. 6a. By adding a parallel-connected single-thyristor switch, the fault current would flow through the thyristors T rather than the diodes. However, it cannot be cleared due to the freewheeling effect. So, the CB in the ac side is still required to be tripped. The process of fault clearance and restart is time-consuming [22]. The double-thyristor switch scheme (DTSS) [17] convert the dc-link fault into an ac short circuit fault. As is analysed in Section 2.1, the fault current would decay to zero automatically. However, the fault current still exists in arms of MMC and may damage other components of the converter [55, 56]. Fig. 6Open in figure viewerPowerPoint Modified half-bridge submodule (a) STSS, (b) DTSS, (c) BBSM, (d) RBSM To address the problems above, in [57], a bidirectional blocking SM (BBSM) is proposed. When all IGBTs are switched off, the fault current is fully transferred to the bypass thyristor. The thyristors work as a fully controlled thyristor rectifier and the fault current is cleared by inhibiting gate signals of thyristors. However, using additional thyristors significantly increases the volume and cost. The HBSM-based topologies are not able to block the fault current. An improved reverse blocking IGBT-based half-bridge SM (RBSM), shown in Fig. 6d, was proposed [58, 59]. The capacitor Cs is charged when the SM current is negative, and then the fault current would be blocked with the increasing of reverse voltage Ucs. However, the fault clearance time is influenced by the charging of Cs and a HV Ucs will impose on the switches. 3.1.2 Full-bridge based SM A wildly preferred method to address the dc fault is full-bridge SM (FBSM) [60]. It can generate reverse voltage regardless of the arm current directions when all IGBTs are switched off, shown in Fig. 7a and Table 1. It also blocks the current from the ac side, while the blocking operation will cause the interruption of real and reactive power exchange with the grid. Table 1. Operations of FBSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4 Vc 1 S2, S3 \ Vc 2 S2, S4 0 2 S1, S3 \ 0 S1, S3 S2, S4 3 S2, S3 −Vc 3 S1, S4 \ −Vc 4 all > Vc < −Vc Fig. 7Open in figure viewerPowerPoint Different states of FBSM (a) FBSM fault operation, (b) Bipolar state: −Vc The FBSM can also generate a negative voltage level −Vc, presented in Fig. 7b. Therefore, the bipolar voltage levels can be utilised to change the relationship of ac/dc voltage and power [61]. By decoupling the dc grid voltage from the SM capacitor voltage, each arm acts as a virtual dc link. With capacitor energy control, the FBSM MMC can work as a STATCOM while riding through dc fault [56, 62]. However, the device count and power losses are high, especially with the increase of SM numbers [63]. To reduce the overall cost, unipolar FBSM (UFBSM), shown in Fig. 8a, was proposed [64, 65]. The switch S3 is eliminated with the loss of the voltage level −Vc. The operation states are shown in Table 2. The dc FRT of UFBSM is similar to FBSM operation. The SM capacitors are connected to the fault current path, where it provides reverse voltage to clear the fault current. The UFBSM can also be applied to bipolar MMC (BMMC) [18] and hybrid-designed MMC. However, due to the loss of negative voltage state, the STATCOM capability of UFBSM is constrained. An asymmetric unipolar FBSM (AUFBSM) was proposed [66], shown in Fig. 8b. A supplemental capacitor is introduced in the short-circuit path. By charging the extra capacitor along with the SM capacitors, a higher reverse voltage is generated and the fault current decays faster. Besides, the required number of SMs in each arm and the overall power losses are both reduced. However, the additional capacitors complicate energy balancing control. Also, a proper design of the parameters is required. Table 2. Operations of UFBSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4 Vc 1 S2 \ Vc 2 S2, S4 0 2 S1 \ 0 3 S1, S4 < −Vc 4 all > Vc < −Vc Fig. 8Open in figure viewerPowerPoint Two structures derived from FBSM (a) UFBSM, (b) AUFBSM 3.1.3 Clamp circuit-based SMs Similarly, the clamp double SM (CDSM) can achieve FRT with the reverse voltage generated by the SM capacitor and eliminate the diode-freewheeling effect [63, 67]. As is shown in Fig. 9b and Table 3, when all the IGBTs are switched off, the SM capacitors are always charged and generate a reverse voltage in the current path. Therefore, the fault current will decay to zero. Table 3. Operations of CDSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4, S5 2Vc 1 S2, S3, S5 < Vc 2 S1, S3, S5 Vc 2 S2, S4, S5 < 0 S2, S4, S5 3 S1, S4, S5 < −Vc 3 S2, S3, S5 0 4 all > 2Vc < −Vc Fig. 9Open in figure viewerPowerPoint Clamp double SM (a) Basic structure, (b) Fault operation With the clamp circuit, the ac fault current can be blocked through voltage of the two series-connected capacitors. Therefore, the number of SMs is halved compared with FBSM counterparts. However, the voltage stress of the additional IGBT S5 and diodes is still high. In [68], a STATCOM operation was proposed based on bipolar voltage. As is shown in Fig. 10, positive and bypassing states are introduced. Fig. 10Open in figure viewerPowerPoint States for STATCOM operation (a) Positive state, (b) Bypassing state With the negative states shown above, i.e. state 3 in Table 3, the arm current is cleared. After the fault current clearance, the diodes in the arms are reverse-biased and the grid current will only flow through the other arms, where the ac current can be controlled. Therefore, the arms of CDSM MMC conduct alternately according to the direction of the phase current, FRT and STATCOM operation are both realised. However, the dc fault current was constrained to a low level rather than being eliminated. Fault-tolerant control of the HVDC transmission system with series-connected double SMs (SCDSM) MMC was investigated [69]. The SCDSM can not only ride-through dc side fault but also produce reactive power to support the grid [70], which is similar to the operation of CDSM. The operations are shown in Table 4. With all the IGBTs being switched off, the two capacitors of SCDSM are connected in the charged state in both current directions, as is shown in Fig. 11b. Diodes will be reverse-biased with enough capacitor voltage, which makes it possible to extinguish the dc arc and restore insulation at the dc short-circuit point. However, the clamp semiconductor S5, D5 and Dcl are required to have higher rated value to withstand higher voltage stress during dc fault. In practical application, two power switching devices should be connected in series to tolerate HV stress, thus increasing the power losses, device cost and complexity. Table 4. Operations of SCDSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4, S5 2Vc 1 S2, S3 \ 2Vc 2 S1, S3, S5 Vc 2 S2, S4 \ Vc S2, S4, S5 3 S1, S4 \ 0 3 S2, S3, S5 0 4 S1, S3, S5 < −Vc 5 S2, S3 < −2Vc 6 all > 2Vc < −2Vc Fig. 11Open in figure viewerPowerPoint Series-connected double submodule (a) Basic structure, (b) Fault operation Another clamp-circuit based SM is the three-level SM (TLSM) [71], shown in Fig. 12. Fig. 12Open in figure viewerPowerPoint Three-level SM (a) Basic structure, (b) Fault operation It equals to two series-connected HBSMs and can output three voltage levels under normal operation, which are 0, Vc and 2Vc. The voltages, especially the voltage level 2Vc shown in state six of Table 5, can be employed to clear the fault current rapidly in both arm current direction. Table 5. Operations of TLSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4, S5, S6 2Vc 1 S2, S3 \ 2Vc 2 S1, S3, S5, S6 Vc 2 S2, S4 \ Vc S2, S4, S5, S6 S1, S3 3 S2, S3, S5, S6 0 3 S1, S4 \ 0 4 S2, S4, S5, S6 < −Vc S1, S3, S5, S6 5 S1, S4, S5, S6 < −2Vc 6 all > 2Vc < −2Vc An active clamped T-type SM (ACTSM) with less devices on the current path is proposed [72]. As is shown in Fig. 13, the proposed ACTSM can generate reverse voltage 2Vc to clear fault current in both arm current directions. Other states are listed in Table 6. It has low power losses, low voltage stress and less amount of independent drive signals. Table 6. Operations of ACTSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S6 2Vc 1 S2, S3, S4, S5 \ 2Vc 2 S1, S4, S5 Vc 2 S2, S3, S6 \ Vc S2, S3, S6 S1, S4, S5 3 S2, S3, S4, S5 0 3 S1, S6 \ 0 4 S1, S4, S6 < −Vc S1, S3, S6 5 S1, S3, S4, S6 < −2Vc 6 all > 2Vc < −2Vc Fig. 13Open in figure viewerPowerPoint Active clamped T-type submodule (a) Basic structure, (b) Fault operation To improve the cost-effectiveness of the MMC application in HVDC transmission, an improved topology based on half-voltage clamp SM (HVCSM) (C1 = C2 = 2C) was developed [73]. The fault operations are shown in Fig. 14 and different states are shown in Table 7. Table 7. Operations of HVCSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S3 Vc 1 S2, S3 < Vc/2 2 S2, S3 0 2 S1, S2 < 0 3 S1, S3 < −Vc/2 4 all > Vc < −Vc/2 Fig. 14Open in figure viewerPowerPoint Half-voltage clamp submodule (a) Basic structure, (b) Fault operation The proposed topology also eliminates the diode freewheeling effect and clear fault current rapidly through the reverse voltage generated by SM capacitors. However, as is shown in Fig. 14b, the capacitor voltage is not fully utilised when arm current is negative. It will increase the required number of SMs to clear the fault current and block the grid feeding current. Also, energy balance control is complex due to C1 and C2. Besides, HVSCM-based MMC cannot work as a STATCOM under the operation scheme proposed in [74]. 3.1.4 Switched-capacitor based SM The switched capacitor SM (SCSM), shown in Fig. 15, can also achieve dc FRT by generating reverse voltage [75]. The SCSM reduces the voltage sensors while maintaining the capability of outputting multilevel voltage. However, as can be seen in Table 8, when all the devices are off, only half the capacitor voltages are utilised. Therefore, to protect the converter from the ac feeding current, more SMs are required, which increases the overall cost. Table 8. Operations of SCSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S2, S3, S4 2Vc 1 S2 \ Vc 2 S1, S3, S4, S5, S6 Vc 2 S1, S3 \ 0 3 S2, S4, S5, S6 0 3 S1, S3, S4 < −Vc 4 all > Vc < −Vc Fig. 15Open in figure viewerPowerPoint Switched capacitor submodule The modified SCSM (MSCSM) can clear the dc fault current by acting as CB [76]. As is shown in Fig. 16b, the fault current feed from the grid can be blocked in whatever fault current path by turning off all the IGBTs, thus the MCSCM works as a CB for dc FRT. Due to the fast response of semiconductor devices, the fault clearance is fast. However, the MSCSM has more power electronic devices and there are four conducting switching devices under normal operation, which not only has a higher cost but also leads to more power losses. Besides, it cannot work as a STATCOM due to the blocking operation. Fig. 16Open in figure viewerPowerPoint Modified switched capacitor submodule (a) Basic structure, (b) Fault operation 3.1.5 Cross-connected SM (CCSM) The five-level cross-connected SM (5LCCSM) [77] can generate 2Vc reverse voltage to clear the fault current in both arm current directions, shown in Fig. 17c. The symmetric output voltage levels are listed in Table 9. However, the two clamp switches are required to withstand at least twice the capacitor voltage. The dynamic and static voltage balancing techniques are also necessary. Besides, the reverse voltage is used to clear the fault current, the clamp devices need to operate in switching mode which results in switching losses. Table 9. Operations of 5LCCSM Normal operation Fault & STATCOM operation State ON Vsm State Off ism Vsm 1 S1, S4, S5 2Vc 1 S1, S4, S5 \ 2Vc 2 S2, S4, S5 Vc 2 S1, S3, S6 \ Vc S1, S3, S5 S2, S4, S6 3 S1, S4, S6 0 3 S1, S4, S6 \ 0 S2, S3, S5 S2, S3, S5 4 S2, S4, S6 Vc 4 S2, S4, S5 \ −Vc 5 S2, S3, S6 −2Vc S1, S3, S5 5 S1, S4, S5 \ −2Vc 6 all > 2Vc < −2Vc Fig. 17Open in figure viewerPowerPoint Cross-connected submodule (a) 5LCCSM, (b) 3LCCSM, (c) Fault operation In [64], a three-level cross-connected SM (3LCCSM) with fewer devices is proposed. The power losses are reduced by eliminating S6. However, similar switching stress for S5, D6 and D5 requires high-rated devices. Practically, in order to meet the required voltage ratings of the crossing switch and diodes, two series-connected IGBT modules and diodes are usually used. A novel first blocking method is proposed to reduce the voltage stress of IGBTs, thus lo