Title: High‐efficiency Doherty power amplifier with wide OPBO range for base station systems
Abstract: IET Microwaves, Antennas & PropagationVolume 13, Issue 7 p. 926-929 Research ArticleFree Access High-efficiency Doherty power amplifier with wide OPBO range for base station systems Zhiqun Cheng, Zhiqun Cheng School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorGuoping Xiong, Guoping Xiong orcid.org/0000-0002-4077-2158 School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorYan Liu, Yan Liu School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorTing Zhang, Ting Zhang Global Big Data Technology Center, University of Technology Sydney, Ulitmo, NSW, 2117 Sydney, AustraliaSearch for more papers by this authorJianting Tian, Jianting Tian School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorY. Jay Guo, Corresponding Author Y. Jay Guo [email protected] Global Big Data Technology Center, University of Technology Sydney, Ulitmo, NSW, 2117 Sydney, AustraliaSearch for more papers by this author Zhiqun Cheng, Zhiqun Cheng School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorGuoping Xiong, Guoping Xiong orcid.org/0000-0002-4077-2158 School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorYan Liu, Yan Liu School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorTing Zhang, Ting Zhang Global Big Data Technology Center, University of Technology Sydney, Ulitmo, NSW, 2117 Sydney, AustraliaSearch for more papers by this authorJianting Tian, Jianting Tian School of Electronic Information, Hangzhou Dianzi University, Hangzhou, 310018 People's Republic of ChinaSearch for more papers by this authorY. Jay Guo, Corresponding Author Y. Jay Guo [email protected] Global Big Data Technology Center, University of Technology Sydney, Ulitmo, NSW, 2117 Sydney, AustraliaSearch for more papers by this author First published: 13 March 2019 https://doi.org/10.1049/iet-map.2018.5617Citations: 10AboutSectionsPDF ToolsRequest permissionExport citationAdd to favoritesTrack citation ShareShare Give accessShare full text accessShare full-text accessPlease review our Terms and Conditions of Use and check box below to share full-text version of article.I have read and accept the Wiley Online Library Terms and Conditions of UseShareable LinkUse the link below to share a full-text version of this article with your friends and colleagues. Learn more.Copy URL Share a linkShare onFacebookTwitterLinkedInRedditWechat Abstract A high-efficiency, S-band Doherty power amplifier (DPA) with wide output power back-off (OPBO) range is presented. A novel parasitic capacitance compensation approach is applied at the output of Cree's GaN high-electron-mobility transistor to achieve high saturation efficiency in a wide OPBO range. Specifically, a parallel shorting microstrip line between the transistor output and its match network is adopted to realise parasitic capacitance compensation. The measurement results indicate good Doherty behaviour with 10 dB back-off efficiency of 40.6–44.2% and saturation efficiency of 70.2–73.3% over 2.9–3.3 GHz. When stimulated by a 20-MHz LTE signal with 7.5 dB PAPR, the proposed Doherty amplifier power, combined with digital pre-distortion, achieved adjacent channel leakage ratios below −47.2 dBc. The DPA demonstrate superior performance in OPBO range and efficiency, which makes it an ideal component for base station communication systems. 1 Introduction The Doherty power amplifiers (DPAs) are widely regarded as an effective structure to achieve high efficiency in the output power back-off (OPBO) condition [[1]], and therefore have been widely used in base station communication systems. However, with the rapid development of communication technology, there is an increasing demand for high efficiency and wide OPBO range. Some high-efficiency DPAs have been reported in literatures [[1]–[3]], but their OPBO range is relatively small; others featured wide OPBO range but relatively low saturation efficiencies [[4], [5]]. Achieving high efficiency and wide OPBO range simultaneously is a significant challenge for DPA designs. In recent years, DPAs based on GaN high-electron-mobility transistors (HEMTs) have attracted great attention. This is largely due to their outstanding material properties, such as its high cut-off frequency and high power density, especially the excellent trade-off between output power and efficiency. However, the presence of parasitic effect, especially the parasitic capacitance at the output of GaN HEMT, has been a major issue limiting the performance of DPAs' drain efficiency (DE) and OPBO range. Therefore, it is of great importance to suppress the parasitic effect in DPA circuit designs. In this paper, a DPA based on CGH40010 GaN HEMTs is presented. A parallel shorted micro-strip line is applied between the transistor output and the output match network to realise parasitic capacitance compensation and consequently a high saturation efficiency in a wide OPBO range at a higher frequency. Details of DPA design, simulation and measurement results are presented in this paper. 2 Device modelling and circuit design A conventional DPA consists of two power amplifiers (PAs), the carrier PA biased for class-AB operation and the peaking PA biased for class-C operation [[1]]. The load modulation network dynamically modulates the effective load impedance of the carrier and the peak PA based on the size of the input signal, and this principle allows the DPA to maintain high efficiency while the output power is backed off. DPA efficiency can be theoretically expressed as follows: (1) In (1), RFOUT = 1/2VRFIRF is the output power of DPA, which is also the sum of saturated output power. VDC_CIDC_C and VDC_PIDC_P are the direct-current power consumed by carrier amplifier and PA, respectively. The OPBO range can be expressed as follows: (2) (3) (4) PSAT_P and PSAT_C are the saturation output power of peaking and carrier amplifiers, respectively, and PBACK-OFF_C is the output power of carrier amplifier at back-off stage. Theoretically, the efficiency at saturated stage is the same as that at the OPBO stage, but the PSAT_P is actually lower than PSAT_C at the saturated stage. This is because the imperfect load modulation of DPA and the peaking amplifier cannot achieve a completely open state due to the low power input, which results in the leakage of PSAT_P to ground via the transistor's internal parasitic capacitance, and RFOUT is reduced correspondingly. In most cases, and PBACK-OFF_C are considered to be constant. Therefore, a decrease of PSAT_P will lead to a power reduction of PSAT_C, and thus a deterioration of τ. Consequently, OPBO range of the DPA is compressed. Additionally, due to the decreasing of output power, the saturated efficiency is reduced. In conclusion, it is critical to suppress PSAT_P and PSAT_C leakage through the parasitic capacitance, so that the DPA's saturated efficiency and OPBO range can be improved. 2.1 Non-linear output capacitor Advanced Design system (ADS) is used to build large signal model of non-linear capacitor (CGH60015 in this paper), and the simulation is conducted using a bare-chip model to show the inherent operation of the saturated PA. Fig. 1 shows a simplified equivalent circuit model of the GaN HEMT to analyse the parasitic capacitance effect. The transistor non-linear model consists of two elements: drain equivalent current source and nonlinear output capacitor COUT. In GaN HEMT devices, the COUT mainly refers to drain-source capacitor (CDS) which is added to the miller effect of the gate-drain capacitance (CGD). The variation of CDS with drain-source voltage (VDS) is slightly nonlinear, but largely affects the waveform of the output power. The relationship between the COUT of GaN HEMT and VDS can be used to express by (5) Fig. 1Open in figure viewerPowerPoint Simplified transistor equivalent circuit model In (5) COUT0, α, β, and γ are constants. These parameters are extracted from the Cree GaN HEMT model (CGH60015) in the way of model simulation. COUT0, α, β, and γ are summarised as 1.9 pF, 1192.4, −0.0594714 and −2.94696, respectively [[6]]. And the relationship between COUT and VDS is shown in Fig. 2, in which the value of COUT decreases rapidly with the increasing of VDS. The model of the packaged device CGH40010 containing a CGH60015 bare chip used to design the proposed DPA in the next section. Fig. 2Open in figure viewerPowerPoint Non-linear output capacitance versus Vds The transistor is equivalent to a voltage controlled current source, in which the voltage and current across COUT can be described as below: (6) where Q(tx) is the charge of the capacitor COUT after time tx. When a negative current i(t) flows through the transistor, VDS(tx) drops along with the decrease of Q(tx), which leads to the rapid increase of COUT. When the bias voltage VDD approaches the minimum value, the transistor is in the low power input range. VDS(tx) is relatively stable due to a limited drive current and the increasing COUT as a compensation. The value of Q(tx) COUT(VDS(tx)) is calculated to be approximately a constant in the low power input range, which indicates that VDS is relatively stable, as well as COUT consequently. Since COUT is in a relatively stable range, it's possible to build an external compensation circuit to suppress PSAT_P and PSAT_C power leakage. In this way, the efficiency and OPBO range of DPA can be improved based on (1)–(4). 2.2 Circuit design An LC parallel resonant circuit is utilised to compensate the transistor's parasitic capacitance. Distribution element circuit, namely microstrip line, is applied to replace lumped elements to avoid additional parasitic effects at this frequency. When the transmission line is shorter than λ/4, it is inductive, and its impedance can be written as (7) where I0 is the terminal current and Z0 is the characteristic impedance. is the wave number. Therefore, a short-circuited microstrip line is applied as an inductor, with its length x shorter than λ/4. The microstrip lines are in parallel between the output of the two transistors and their output matching circuits. They resonate with the two transistors' COUT to compensate the parasitic capacitance effect. The impedance between the two transistors' output port and the matching circuits can be expressed by (8) In (8), angular frequency , where f is the center frequency and L is the inductance value of shorted microstrip line. R is the resistance of shorted microstrip line which equals to Z(−x). When (9) (10) a resonance occurs in the circuit composed of COUT and short-circuit microstrip line. The value of L can be expressed by (11) We can use the following formulas to calculate the length, x, and width, y, of the microstrip line that compensates for parasitic capacitance, which can be expressed by the following equation: (12) and the width of microstrip line is related to the characteristic impedance , which can be expressed by (13) (14) where is the free-space wave impedance, and is the coefficient. The h is the thickness of the medium, and is the relative dielectric constant. From the above formulas, the inductance for compensating the parasitic capacitance can be equivalent to the form of a microstrip line. Parallel resonance compensates for the parasitic effects, which eliminates the power leakage through COUT to the ground. Therefore, it prevents the PSAT_P and PSAT_C from attenuation. The OPBO range is extended and the saturation efficiency of DPA is consequently improved due to the increased RFOUT. Once the capacitance compensation network is determine the DPA is designed based on Cree's CGH40010 GaN HEMT. Rogers4350B is chosen as the PA plate (substrate thickness 30 mil, dielectric constant 3.66). The carrier amplifier operates in class AB with a DC bias of 28 and −2.7 V. The peak PA operates in class C with a DC bias of 30 and −5.5 V. The compensation circuits and output matching circuits of proposed DPA is shown in Fig. 3. Fig. 3Open in figure viewerPowerPoint Output matching circuits of proposed DPA 3 Simulation and measurement results Fig. 4 shows the photo of the developed DPA circuit, with the compensation network labelled along with RF and DC ports. Characterisation of the fabricated DPA driven by a continuous wave (CW) signal is shown in Figs. 5a and b. In Fig. 5a, the measured DE is 67.2–73.3% at saturation and 40.4–52.2% at 6 dB OPBO, over the frequency range from 2.7 to 3.6 GHz, which agrees well with the simulation results. The high efficiency of the DPA is observed with saturation output power ranging from 43.9 to 44.7 dBm within the 900 MHz bandwidth. Fig. 4Open in figure viewerPowerPoint Photo of the designed DPA Fig. 5Open in figure viewerPowerPoint Simulation and measurement results (a) HB simulation and measure comparison of saturated drainefficiency, output power and gain, (b) Simulated andmeasured drain efficiency, output power and gain of the proposed DPA at10 dB back-off Fig. 5b shows the simulated and measured DE, output power and gain of the proposed DPA at 10 dB back-off power. The back-off DE around 40.6–44.2% is achieved over the entire OPBO region of 10 dB, as well as a peak Pout around 44.7 dBm. To further demonstrate the DPA's performance in communication systems, a long-term evolution (LTE) signal at 3.1 GHz (7.5 dB PAPR) is applied to the RF input, with a bandwidth of 20 MHz. Digital pre-distortion (DPD) technology is used to increase the DPA's linearity range, which is typical in modern communication systems. The measured drain efficiency and gain of the Doherty amplifier as a function of the output power are shown in Fig. 6 for 2.9, 3.0, 3.1, 3.2, and 3.3 GHz CW excitation. The typical Doherty high-efficiency region can be observed: it spans from a maximum output power exceeding 44.7 dBm to 10-dB back-off at all of the measurement frequencies. Fig. 7 shows the measured output spectrum of the DPA, with and without DPD applied. An adjacent channel leakage ratio (ACLR) of − 47.2 dBc is obtained, which is lower than the requirement for a base station PA, normally − 45 dBc. A comparison has been made regarding the performance of the proposed DPA in this work and reported ones in Table 1. The proposed DPA demonstrates significant improvements in both OPBO range and saturation efficiency in the S-band. Fig. 6Open in figure viewerPowerPoint Gain and drain efficiency profiles versus output power Fig. 7Open in figure viewerPowerPoint Measured power spectral density of a 20 MHz LTE signal at 3.1 GHz with and without digital preditortion Table 1. Comparisons with reported high efficiency and high back-off DPAs Reference Frequency, GHz Pout, dBm DE at sat, % OPBO, dB DE at OPBO, % [[4]] 1.7–2.8 44–44.5 57–71 9 37–41 [[5]] 0.73–0.98 44 45–68 9 49–64 [[7]] 1.9–2.2 43.8 — 9 47 [[8]] 1.6–2.4 40.5–41.5 55–60 6 42–54 [[9]] 1.5–2.4 42 65 6 >49 [[10]] 2–2.7 41 58–70 9 45–66 [[11]] 2 33.2 67 9.1 57.4 [[12]] 1.5–2.5 42–44.5 55–75 6 42–53 TW 2.9–3.3 43.9–44.7 70.8–73.3 10 40.6–44.2 4 Conclusion In this paper, a high-performance S-band DPA is presented based on Cree's CGH40010 GaN HEMT, featuring high efficiency and wide OPBO range. A novel parasitic capacitance compensation network is developed for the DPA design, which effectively suppress the power leakage of the transistor. The overall saturation power of the DPA is increased, thus resulting in a significant improvement in the DPA's efficiency and OPBO range. Measured results indicate that the proposed DPA design has an excellent saturation efficiency over 70% and a 10 dB OPBO range. Hence, high saturation efficiency in wide output power back off range has been achieved by the DPA, which makes it an attractive device for the transceiver system of cellular base stations. 5 Acknowledgments This work was supported by Key Project of Zhejiang Provincial Natural Science Foundation of China (no. LZ16F010001). 6 References [1]Liu, Q.A., He, S.B., Shi, W.M.: 'Design of 3.5 GHz linear high-efficiency Doherty power amplifier with pre-matching'. Microwave Conf. IEEE, 2015, pp. 1– 3 [2]Wu, D.Y.-T., Boumaiza, S.: 'A modified Doherty configuration for broadband amplification using symmetrical devices', IEEE Trans. Microw. Theory Tech., 2012, 60, (10), pp. 3201– 3213 [3]Giofrè, R., Piazzon, L., Colantoni, P., et al.: 'A closed-form design technique for ultra-wideband Doherty power amplifiers', IEEE Trans. Microw. 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