Title: Capacitor Mismatch Calibration Technique to Improve the SFDR of 14-Bit SAR ADC
Abstract: This paper presents mismatch calibration technique to improve the SFDR in a 14-bit successive approximation register (SAR) analog-to-digital converter (ADC) for wearable electronics application. Behavioral Monte-Carlo simulations are applied to demonstrate the effect of the proposed method where no complex digital calibration algorithm or auxiliary calibration DAC needed. Simulation results show that with a mismatch error typical of modern technology, the SFDR is enhanced by more than 20 dB with the proposed technique for a 14-bit SAR ADC.
Publication Year: 2017
Publication Date: 2017-07-01
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 7
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