Abstract: In Built-In Self-Test (BIST), test patterns are generated and applied to the circuit-under-test (CUT) by on-chip hardware; minimizing hardware overhead is a major concern of BIST implementation. In pseudorandom BIST architectures, the test patterns are generated in random nature by Linear Feedback Shift Registers(LFSR). A System-on-Chip (SOC) is the integration of all components of an electronic/computing system on a single integrated circuit. This paper presents a novel test pattern generation technique called BIST,As the complexity grows, testing is becoming one of the most significant factors that contribute to the final product cost. The established low-level methods for hardware testing are not any more sufficient and more work has to be done at abstraction levels higher than the classical gate and register-transfer levels. This paper deals with testing and design for testability of modern digital systems. This process is performed BY Pseudo-random testing is an attractive approach for BIST. A linear feedback shift register (LFSR) can be used to apply pseudo-random patterns to the CUT.
Publication Year: 2015
Publication Date: 2015-01-01
Language: en
Type: article
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