Title: Fast algorithm and hardware implementation for T_2 encoder in JPEG2000
Abstract: A fast algorithm for T_2 encoder in JPEG2000 suitable for hardware implementation is presented based on the elaborate analysis of rate-distortion optimization algorithm, and its architecture of hardware design is explained in detail. By reducing the calculation complexity of the rate-distortion slope estimate and simplifying the design of optimized truncation and tag tree encoding in code stream organization, the difficulty and the resource of hardware implementation for T_2 encoder are reduced, and the parallelizability of the JPEG2000 hardware system enhancs. The experimental results show that the final code stream accords with the standard format of JPEG2000 and the quality loss of images is little. The system has been implemented on FPGA.
Publication Year: 2004
Publication Date: 2004-01-01
Language: en
Type: article
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