Title: Design and Implementation of High Efficient Modulo 2~n-2~k-1 Adder VLSI for RNS
Abstract: The design of high efficient modulo adders is important for DSP algorithms implemented by Residue Number System(RNS).Moduli sets of this form 2n-2k-1 offer many advantages,such as larger dynamic range and excellent balance among the RNS channels.In this paper,a general algorithm and its VLSI implementation structure are proposed for the modulo 2n-2k-1 adder.The proposed algorithm is based on the techniques of prefix operation and carry correction,which eliminates the re-computation of carries.And any existing prefix operation structure can be adopted in the proposed structure.Compared with the same modulo 2n-2k-1 adders with different structures,the proposed modulo adder offers better areadelay.
Publication Year: 2010
Publication Date: 2010-01-01
Language: en
Type: article
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