Abstract: With the development of electronic technology,EDA emerges as the times require.Use EDA technology to a system design,VHDL is a mostly instrumentality and it is an utility language to simulation of the digital system.The article will introduce this language and give an exemple.In the exemple we will give a simple programme to explain the method in design and the importance in simulation by using VHDL.Finally,we will obtain the waveform of simulation.
Publication Year: 2009
Publication Date: 2009-01-01
Language: en
Type: article
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