Title: Design of Sequence Generator with Synchronous Parallel LFSR Based on FPGA
Abstract: The sequence generated by single Linear Feedback Shift Register(LFSR)directly can not resist the linear approximation attack,since it has low linear complexity.The thesis presents a method of constituting a sequence generator with three synchronous parallel LFSRs based on a Field Programmable Gate Array(FPGA) on the foundation of study of the theory of sequence design and parallel LFSR,and provides the implementation program with VHSIC Hardware Description Language(VHDL),finally uses the designing instrument of FPGA——Xilinx ISE7.1i,and calls ModelSim SE6.1c to simulate it.The result of simulation and the assessment of intensity indicate that the consequence generated by the generator specially designed possess high intensity and the ability of resisting deciphering.
Publication Year: 2008
Publication Date: 2008-01-01
Language: en
Type: article
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