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{'id': 'https://openalex.org/W2188303602', 'doi': None, 'title': 'A Simultaneous Partitioning algorithm for VLSI Placement', 'display_name': 'A Simultaneous Partitioning algorithm for VLSI Placement', 'publication_year': 1990, 'publication_date': '1990-01-01', 'ids': {'openalex': 'https://openalex.org/W2188303602', 'mag': '2188303602'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'http://www.dbpia.co.kr/Journal/ArticleDetail/NODE00390470', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4306420104', 'display_name': 'International Symposium on Circuits and Systems', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': [], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5021066664', 'display_name': 'Nak Woon Eum', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Nak Woon Eum', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5052100814', 'display_name': 'Byoung Yoon Choon', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Byoung Yoon Choon', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5015219171', 'display_name': 'Hyun Chan Lee', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Hyun Chan Lee', 'raw_affiliation_strings': [], 'affiliations': []}, {'author_position': 'last', 'author': {'id': 'https://openalex.org/A5038869516', 'display_name': 'Chul Dong Lee', 'orcid': None}, 'institutions': [], 'countries': [], 'is_corresponding': False, 'raw_author_name': 'Chul Dong Lee', 'raw_affiliation_strings': [], 'affiliations': []}], 'institution_assertions': [], 'countries_distinct_count': 0, 'institutions_distinct_count': 0, 'corresponding_author_ids': [], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.0, 'has_fulltext': False, 'cited_by_count': 0, 'citation_normalized_percentile': {'value': 0.0, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 0, 'max': 54}, 'biblio': {'volume': None, 'issue': None, 'first_page': '420', 'last_page': '423'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T11522', 'display_name': 'Design and Optimization of Field-Programmable Gate Arrays and Application-Specific Integrated Circuits', 'score': 0.9989, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T11522', 'display_name': 'Design and Optimization of Field-Programmable Gate Arrays and Application-Specific Integrated Circuits', 'score': 0.9989, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T10904', 'display_name': 'Reconfigurable Computing Systems and Design Methods', 'score': 0.9981, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11032', 'display_name': 'Very Large Scale Integration Testing', 'score': 0.9981, 'subfield': {'id': 'https://openalex.org/subfields/1708', 'display_name': 'Hardware and Architecture'}, 'field': {'id': 'https://openalex.org/fields/17', 'display_name': 'Computer Science'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/graph-partitioning', 'display_name': 'Graph Partitioning', 'score': 0.676699}, {'id': 'https://openalex.org/keywords/dynamic-load-balancing', 'display_name': 'Dynamic Load Balancing', 'score': 0.588296}, {'id': 'https://openalex.org/keywords/geometric-programming', 'display_name': 'Geometric Programming', 'score': 0.573513}, {'id': 'https://openalex.org/keywords/placement', 'display_name': 'Placement', 'score': 0.5711}, {'id': 'https://openalex.org/keywords/power-optimization', 'display_name': 'Power Optimization', 'score': 0.564677}, {'id': 'https://openalex.org/keywords/algorithm-design', 'display_name': 'Algorithm design', 'score': 0.4465916}], 'concepts': [{'id': 'https://openalex.org/C14580979', 'wikidata': 'https://www.wikidata.org/wiki/Q876049', 'display_name': 'Very-large-scale integration', 'level': 2, 'score': 0.8490507}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.66650695}, {'id': 'https://openalex.org/C173608175', 'wikidata': 'https://www.wikidata.org/wiki/Q232661', 'display_name': 'Parallel computing', 'level': 1, 'score': 0.55057335}, {'id': 'https://openalex.org/C11413529', 'wikidata': 'https://www.wikidata.org/wiki/Q8366', 'display_name': 'Algorithm', 'level': 1, 'score': 0.48619884}, {'id': 'https://openalex.org/C106516650', 'wikidata': 'https://www.wikidata.org/wiki/Q8366', 'display_name': 'Algorithm design', 'level': 2, 'score': 0.4465916}, {'id': 'https://openalex.org/C149635348', 'wikidata': 'https://www.wikidata.org/wiki/Q193040', 'display_name': 'Embedded system', 'level': 1, 'score': 0.17953604}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'http://www.dbpia.co.kr/Journal/ArticleDetail/NODE00390470', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4306420104', 'display_name': 'International Symposium on Circuits and Systems', 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 0, 'referenced_works': [], 'related_works': ['https://openalex.org/W2273543434', 'https://openalex.org/W2273282322', 'https://openalex.org/W2270296519', 'https://openalex.org/W2266176624', 'https://openalex.org/W2262699802', 'https://openalex.org/W2248578485', 'https://openalex.org/W2235063243', 'https://openalex.org/W2226050439', 'https://openalex.org/W2222319180', 'https://openalex.org/W2218140054', 'https://openalex.org/W2212074095', 'https://openalex.org/W2208985477', 'https://openalex.org/W2207649440', 'https://openalex.org/W2204440349', 'https://openalex.org/W2198313683', 'https://openalex.org/W2196539892', 'https://openalex.org/W2150801375', 'https://openalex.org/W2142153597', 'https://openalex.org/W1896163435', 'https://openalex.org/W1894129309'], 'abstract_inverted_index': None, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2188303602', 'counts_by_year': [], 'updated_date': '2024-09-19T02:18:59.042902', 'created_date': '2016-06-24'}