Title: An ultra low voltage ultra high gain CMOS LNA using forward body biasing technique
Abstract: A fully integrated 1.5 GHz low noise amplifier suitable for ultra-low voltage applications is designed and simulated in a standard 0.18µm CMOS technology. Using the folded cascode topology and forward body biasing technique, the proposed LNA works at a very low supply voltage and low power consumption. The proposed LNA has a power gain (S <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf> ) of 22 dB with a noise figure of 1.9 dB, while consuming 2.5mW dc power with an ultra low supply voltage of 0.5 V.
Publication Year: 2011
Publication Date: 2011-08-01
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 8
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