Title: Comparison of ultra-low-power and static CMOS full adders in 0.15 µm FD SOI CMOS
Abstract: Ultra-low-power and static CMOS full adders are implemented in a 0.15 mum FD SOI CMOS technology with 1.5 V supply. The power consumption of ultra-low-power full adder is shown to be half that of static CMOS. These results are confirmed by both measurements and SPICE simulations in different corners of operation.
Publication Year: 2009
Publication Date: 2009-10-01
Language: en
Type: article
Indexed In: ['crossref']
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