Abstract: It is pointed out that the traditional CMOS-BiCMOS comparison of isolated circuits driving capacitive loads is not adequate. When multistage circuits and chip wiring resistance are also considered, CMOS is shown to be very competitive. In a high-performance BiCMOS logic chip design, 96% of the circuits can be converted to CMOS. For low-capacitance nets and nets with enough delay margin, CMOS is the clear preference due to its better density, circuit simplicity, lower sensitivity to wiring resistance, lower dl/dt and clear migration path to the next technology generation. CMOS is expected to remain the dominant circuit type for logic.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Publication Year: 2002
Publication Date: 2002-12-09
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 5
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