Title: Driving toward higher I/sub DDQ/ test quality for sequential circuits: A generalized fault model and its ATPG
Abstract: We propose a generalized stuck-at fault model for sequential circuits under the selective I/sub DDQ/ test strategy. The proposed fault model makes a pessimistic assumption on the Boolean fault effects when the fault is activated. We show that by using the proposed fault model, test sequences of higher quality can be generated and/or selected. We further propose a test vector generation and selection method for this fault model. We present results to illustrate that a high fault coverage for the proposed fault model can be achieved by a small test set under the selective I/sub DDQ/ test environment.
Publication Year: 1996
Publication Date: 1996-11-10
Language: en
Type: article
Access and Citation
Cited By Count: 7
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot