Title: Rectification of multiple logic design errors in multiple output circuits
Abstract: Article Free Access Share on Rectification of multiple logic design errors in multiple output circuits Authors: Masahiro Tomita The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, JapanView Profile , Tamotsu Yamamoto Semiconductor CAD Engineering Dept., Toshiba Corp., 580-1, Horikawa-cho, Saiwai-ku, Kawasaki, 210, Japan Semiconductor CAD Engineering Dept., Toshiba Corp., 580-1, Horikawa-cho, Saiwai-ku, Kawasaki, 210, JapanView Profile , Fuminori Sumikawa The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, JapanView Profile , Kotaro Hirano The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, JapanView Profile Authors Info & Claims DAC '94: Proceedings of the 31st annual Design Automation ConferenceJune 1994Pages 212–217https://doi.org/10.1145/196244.196356Published:06 June 1994Publication History 42citation248DownloadsMetricsTotal Citations42Total Downloads248Last 12 Months24Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF