A semi-custom design flow in high-performance microprocessor design

Name: Work Video:
Duration: 3 min 30 s
Description: In this paper we present techniques shown to significantly enhance the custom circuit design process typical of high-performance microprocessors. This methodology combines flexible custom circuit design with automated tuning and physical design tools to provide new opportunities to optimized design throughout the development cycle.
Gregory A. Northrop; Pong-Fei Lu
{'id': 'https://openalex.org/W2126983197', 'doi': 'https://doi.org/10.1145/378239.378546', 'title': 'A semi-custom design flow in high-performance microprocessor design', 'display_name': 'A semi-custom design flow in high-performance microprocessor design', 'publication_year': 2001, 'publication_date': '2001-01-01', 'ids': {'openalex': 'https://openalex.org/W2126983197', 'doi': 'https://doi.org/10.1145/378239.378546', 'mag': '2126983197'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.1145/378239.378546', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4363608861', 'display_name': "Proceedings of the 40th conference on Design automation - DAC '03", 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5027093875', 'display_name': 'Gregory A. Northrop', 'orcid': None}, 'institutions': [{'id': 'https://openalex.org/I1341412227', 'display_name': 'IBM (United States)', 'ror': 'https://ror.org/05hh8d621', 'country_code': 'US', 'type': 'company', 'lineage': ['https://openalex.org/I1341412227']}], 'countries': ['US'], 'is_corresponding': False, 'raw_author_name': 'Gregory A. Northrop', 'raw_affiliation_strings': ['IBM Research, Yorktown Heights,, NY, USA'], 'affiliations': [{'raw_affiliation_string': 'IBM Research, Yorktown Heights,, NY, USA', 'institution_ids': ['https://openalex.org/I1341412227']}]}, {'author_position': 'last', 'author': {'id': 'https://openalex.org/A5113695874', 'display_name': 'Pong-Fei Lu', 'orcid': None}, 'institutions': [{'id': 'https://openalex.org/I1341412227', 'display_name': 'IBM (United States)', 'ror': 'https://ror.org/05hh8d621', 'country_code': 'US', 'type': 'company', 'lineage': ['https://openalex.org/I1341412227']}], 'countries': ['US'], 'is_corresponding': False, 'raw_author_name': 'Pong-Fei Lu', 'raw_affiliation_strings': ['IBM Research, Yorktown Heights, NY'], 'affiliations': [{'raw_affiliation_string': 'IBM Research, Yorktown Heights, NY', 'institution_ids': ['https://openalex.org/I1341412227']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': [], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 7.528, 'has_fulltext': True, 'fulltext_origin': 'ngrams', 'cited_by_count': 37, 'citation_normalized_percentile': {'value': 0.95784, 'is_in_top_1_percent': False, 'is_in_top_10_percent': True}, 'cited_by_percentile_year': {'min': 90, 'max': 91}, 'biblio': {'volume': None, 'issue': None, 'first_page': None, 'last_page': None}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T10363', 'display_name': 'Low-power high-performance VLSI design', 'score': 0.9999, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T10363', 'display_name': 'Low-power high-performance VLSI design', 'score': 0.9999, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11522', 'display_name': 'VLSI and FPGA Design Techniques', 'score': 0.9999, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11527', 'display_name': '3D IC and TSV technologies', 'score': 0.9997, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/design-flow', 'display_name': 'Design flow', 'score': 0.82674897}, {'id': 'https://openalex.org/keywords/microprocessor', 'display_name': 'Microprocessor', 'score': 0.6305132}, {'id': 'https://openalex.org/keywords/design-cycle', 'display_name': 'Design cycle', 'score': 0.5466115}, {'id': 'https://openalex.org/keywords/design-methods', 'display_name': 'Design methods', 'score': 0.502989}, {'id': 'https://openalex.org/keywords/design-process', 'display_name': 'Design process', 'score': 0.4888958}, {'id': 'https://openalex.org/keywords/integrated-circuit-design', 'display_name': 'Integrated circuit design', 'score': 0.46807134}, {'id': 'https://openalex.org/keywords/electronic-design-automation', 'display_name': 'Electronic design automation', 'score': 0.46251857}], 'concepts': [{'id': 'https://openalex.org/C37135326', 'wikidata': 'https://www.wikidata.org/wiki/Q931942', 'display_name': 'Design flow', 'level': 2, 'score': 0.82674897}, {'id': 'https://openalex.org/C188817802', 'wikidata': 'https://www.wikidata.org/wiki/Q13426855', 'display_name': 'Physical design', 'level': 3, 'score': 0.76841736}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.6756925}, {'id': 'https://openalex.org/C2780728072', 'wikidata': 'https://www.wikidata.org/wiki/Q5297', 'display_name': 'Microprocessor', 'level': 2, 'score': 0.6305132}, {'id': 'https://openalex.org/C118524514', 'wikidata': 'https://www.wikidata.org/wiki/Q173212', 'display_name': 'Computer architecture', 'level': 1, 'score': 0.57201016}, {'id': 'https://openalex.org/C190560348', 'wikidata': 'https://www.wikidata.org/wiki/Q3245116', 'display_name': 'Circuit design', 'level': 2, 'score': 0.5717143}, {'id': 'https://openalex.org/C2982740150', 'wikidata': 'https://www.wikidata.org/wiki/Q5249230', 'display_name': 'Design cycle', 'level': 2, 'score': 0.5466115}, {'id': 'https://openalex.org/C138852830', 'wikidata': 'https://www.wikidata.org/wiki/Q2292993', 'display_name': 'Design methods', 'level': 2, 'score': 0.502989}, {'id': 'https://openalex.org/C48262172', 'wikidata': 'https://www.wikidata.org/wiki/Q16908765', 'display_name': 'Design process', 'level': 3, 'score': 0.4888958}, {'id': 'https://openalex.org/C74524168', 'wikidata': 'https://www.wikidata.org/wiki/Q1074539', 'display_name': 'Integrated circuit design', 'level': 2, 'score': 0.46807134}, {'id': 'https://openalex.org/C64260653', 'wikidata': 'https://www.wikidata.org/wiki/Q1194864', 'display_name': 'Electronic design automation', 'level': 2, 'score': 0.46251857}, {'id': 'https://openalex.org/C98045186', 'wikidata': 'https://www.wikidata.org/wiki/Q205663', 'display_name': 'Process (computing)', 'level': 2, 'score': 0.42590067}, {'id': 'https://openalex.org/C157922185', 'wikidata': 'https://www.wikidata.org/wiki/Q173198', 'display_name': 'Logic synthesis', 'level': 3, 'score': 0.41025734}, {'id': 'https://openalex.org/C149635348', 'wikidata': 'https://www.wikidata.org/wiki/Q193040', 'display_name': 'Embedded system', 'level': 1, 'score': 0.39847413}, {'id': 'https://openalex.org/C201995342', 'wikidata': 'https://www.wikidata.org/wiki/Q682496', 'display_name': 'Systems engineering', 'level': 1, 'score': 0.3131069}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.2392985}, {'id': 'https://openalex.org/C131017901', 'wikidata': 'https://www.wikidata.org/wiki/Q170451', 'display_name': 'Logic gate', 'level': 2, 'score': 0.21283376}, {'id': 'https://openalex.org/C174998907', 'wikidata': 'https://www.wikidata.org/wiki/Q357662', 'display_name': 'Work in process', 'level': 2, 'score': 0.13169524}, {'id': 'https://openalex.org/C111919701', 'wikidata': 'https://www.wikidata.org/wiki/Q9135', 'display_name': 'Operating system', 'level': 1, 'score': 0.090473235}, {'id': 'https://openalex.org/C78519656', 'wikidata': 'https://www.wikidata.org/wiki/Q101333', 'display_name': 'Mechanical engineering', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C21547014', 'wikidata': 'https://www.wikidata.org/wiki/Q1423657', 'display_name': 'Operations management', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C11413529', 'wikidata': 'https://www.wikidata.org/wiki/Q8366', 'display_name': 'Algorithm', 'level': 1, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.1145/378239.378546', 'pdf_url': None, 'source': {'id': 'https://openalex.org/S4363608861', 'display_name': "Proceedings of the 40th conference on Design automation - DAC '03", 'issn_l': None, 'issn': None, 'is_oa': False, 'is_in_doaj': False, 'is_core': False, 'host_organization': None, 'host_organization_name': None, 'host_organization_lineage': [], 'host_organization_lineage_names': [], 'type': 'conference'}, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [{'id': 'https://metadata.un.org/sdg/9', 'display_name': 'Industry, innovation and infrastructure', 'score': 0.51}], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 7, 'referenced_works': ['https://openalex.org/W1502501036', 'https://openalex.org/W2027731431', 'https://openalex.org/W2048432526', 'https://openalex.org/W2062380627', 'https://openalex.org/W2092693137', 'https://openalex.org/W2104733895', 'https://openalex.org/W2148201816'], 'related_works': ['https://openalex.org/W4253195573', 'https://openalex.org/W3205162826', 'https://openalex.org/W2908947570', 'https://openalex.org/W2743305891', 'https://openalex.org/W2610167993', 'https://openalex.org/W2535520145', 'https://openalex.org/W2059530328', 'https://openalex.org/W2051886008', 'https://openalex.org/W2020934033', 'https://openalex.org/W1716153929'], 'abstract_inverted_index': {'In': [0], 'this': [1], 'paper': [2], 'we': [3], 'present': [4], 'techniques': [5], 'shown': [6], 'to': [7, 33, 37], 'significantly': [8], 'enhance': [9], 'the': [10, 41], 'custom': [11, 23], 'circuit': [12, 24], 'design': [13, 25, 31, 39], 'process': [14], 'typical': [15], 'of': [16], 'high-performance': [17], 'microprocessors.': [18], 'This': [19], 'methodology': [20], 'combines': [21], 'flexible': [22], 'with': [26], 'automated': [27], 'tuning': [28], 'and': [29], 'physical': [30], 'tools': [32], 'provide': [34], 'new': [35], 'opportunities': [36], 'optimized': [38], 'throughout': [40], 'development': [42], 'cycle.': [43]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W2126983197', 'counts_by_year': [{'year': 2021, 'cited_by_count': 1}, {'year': 2020, 'cited_by_count': 1}, {'year': 2017, 'cited_by_count': 1}, {'year': 2013, 'cited_by_count': 1}], 'updated_date': '2024-12-10T04:34:11.228213', 'created_date': '2016-06-24'}
Publication Information

Basic Information

Access and Citation

AI Researcher Chatbot

Primary Location

Authors

Topics

Keywords

Related Works
