Title: Direct digital synthesizer with ROM-Less architecture at 13-GHz clock frequency in InP DHBT technology
Abstract:A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor (DHBT) technology is reported. The DDS has a ROM-less architecture and instead uses digital logic for pha...A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor (DHBT) technology is reported. The DDS has a ROM-less architecture and instead uses digital logic for phase conversion. The DDS operates up to a 13 GHz clock rate and is capable of synthesizing output frequencies up to 6.5 GHz. Measured spurious free dynamic range (SFDR)ranged from 34 dBc at low frequency control words (FCWs) to 26.67 dBc at high FCWs. The test circuit is implemented with 1646 transistors and consumes 5.42W of powerRead More
Publication Year: 2006
Publication Date: 2006-05-01
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 43
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