Title: A 1.2 V CMOS op-amp with high driving capability
Abstract: In this work, a new low voltage (1.2 V supply) op-amp, able to drive loading resistance as low as 500 /spl Omega/, with 2 V//spl mu/s slew rate and 380 ns settling time, is presented. The low voltage gain is 80 dB for 1 K/spl Omega/ and 124 dB for 1 M/spl Omega/ load. The gain bandwidth is 2.4 MHz. The power dissipation is 0.268 mW. The circuit, designed in a standard 0.5 /spl mu/ technology, has rail-to-rail input and output stages and constant transconductance with the input common mode signal. Its performances have been obtained combining the topologies of a very efficient output stage and of the input and biasing stages of a CMOS integrated OTA, previously developed.
Publication Year: 2002
Publication Date: 2002-11-27
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 1
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