Title: On the effective bandwidth of interleaved memories in vector processor systems
Abstract: Memory interleaving and multiple access ports are the key to a high memory bandwidth in vector processor systems. Each of the active ports supports an independent access stream to memory among which access conflicts may arise. Such conflicts lead to a decrease in memory bandwidth. The authors present some analytical results for the calculation of the resulting effect bandwidth for one and two access streams to a memory system in a vector processor. In particular, conditions for conflict-free access are given together with some conflicting cases that should be avoided. Finally, examples of measurements on a Cray X-MP and corresponding simulations are presented.
Publication Year: 1985
Publication Date: 1985-10-01
Language: en
Type: article
Indexed In: ['crossref']
Access and Citation
Cited By Count: 99
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot