Title: Two-level pipelined systolic arrays for matrix-vector multiplication
Abstract: Novel two-level pipelined linear systolic arrays for matrix vector multiplication are proposed. The number of processing elements in the proposed arrays s reduced to half of the number of processing elements in the existing arrays. An area-time (AT) criteria is used to compare the proposed arrays with the fastest existing one.
Publication Year: 1998
Publication Date: 1998-02-01
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 9
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