Title: The MAJC architecture: a synthesis of parallelism and scalability
Abstract: The MAJC architecture enhances application performance by exploiting parallelism at multiple levels-instruction, data, thread, and process. Supporting vertical multithreading, speculative multithreading, and chip multiprocessors, the scalable VLIW architecture is also capable of advanced speculation and predication and treats all data types similarly.
Publication Year: 2000
Publication Date: 2000-01-01
Language: en
Type: article
Indexed In: ['crossref']
Access and Citation
Cited By Count: 92
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