Title: Mapping massive SIMD parallelism onto vector architectures for simulation
Abstract: Abstract A software behavioural simulator for a new massively parallel single‐instruction/multiple data (SIMD) architecture has been developed that can accurately simulate the entire 16, 384 bit‐serial processor array. The key to this high performance modelling is the exploitation of an inherent mapping that exists between massively parallel SIMD architectures and the vector architectures used in many high performance scientific super‐computers. The new SIMD architecture, called BLITZEN, is based on the Massively Parallel Processor (MPP) built for NASA by Goodyear in the late 1970s. By simulating the full‐scale machine with very high performance, the simulator allows development of algorithms and high‐level software to proceed before realization of the hardware. This paper describes the SIMD ‐ vector architecture mapping, the highly vectorized simulator in which it is used, and how the result was a simulator that achieved a level of performance three orders of magnitude faster than the conventional uniprocessor approach.
Publication Year: 1989
Publication Date: 1989-08-01
Language: en
Type: article
Indexed In: ['crossref']
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