Title: A 0.9-V, 7-mW UWB LNA for 3.1–10.6-GHz wireless applications in 0.18- CMOS technology
Abstract: This paper presents a low-voltage and low-power CMOS low noise amplifier (LNA) for ultra-wideband (UWB) wireless applications. A cascade stage topology based on common source amplifier has been proposed to reduce the supply voltage of the proposed LNA. In addition, a high-pass filtering network is chosen instead of a Chebyshev band pass structure to simultaneously perform the wideband input matching and to improve the noise figure over the desired band. Using a 0.18μm CMOS process, the proposed LNA exhibit a state of the art performance consuming only 7 mW from a 0.9 V supply voltage. Post-layout simulation results show a power gain S21 of 13.5 dB with gain ripple of ±1.5 dB, in the frequency range of 3.1–10.6 GHz. The noise figure is below 4.6 dB with a minimum of 2.7 dB at 4.5 GHz. The input and output return losses S11 and S22 are better than −9 dB and −15 dB, respectively. The highest value of IP3 is −8 dBm obtained at 5 GHz. The active silicon area occupied by the UWB–LNA is only 0.59 mm2.
Publication Year: 2011
Publication Date: 2011-11-01
Language: en
Type: article
Indexed In: ['crossref']
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Cited By Count: 24
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