Publication Information

{'id': 'https://openalex.org/W1523339347', 'doi': 'https://doi.org/10.1109/scs.2003.1227062', 'title': 'Efficient symbolic analysis method for large-scale analog circuits', 'display_name': 'Efficient symbolic analysis method for large-scale analog circuits', 'publication_year': 2004, 'publication_date': '2004-05-06', 'ids': {'openalex': 'https://openalex.org/W1523339347', 'doi': 'https://doi.org/10.1109/scs.2003.1227062', 'mag': '1523339347'}, 'language': 'en', 'primary_location': {'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/scs.2003.1227062', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}, 'type': 'article', 'type_crossref': 'proceedings-article', 'indexed_in': ['crossref'], 'open_access': {'is_oa': False, 'oa_status': 'closed', 'oa_url': None, 'any_repository_has_fulltext': False}, 'authorships': [{'author_position': 'first', 'author': {'id': 'https://openalex.org/A5102772630', 'display_name': 'Mihai Iordache', 'orcid': 'https://orcid.org/0000-0002-2990-0227'}, 'institutions': [{'id': 'https://openalex.org/I61641377', 'display_name': 'Universitatea Națională de Știință și Tehnologie Politehnica București', 'ror': 'https://ror.org/0558j5q12', 'country_code': 'RO', 'type': 'education', 'lineage': ['https://openalex.org/I61641377']}], 'countries': ['RO'], 'is_corresponding': False, 'raw_author_name': 'M. Iordache', 'raw_affiliation_strings': ['Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA'], 'affiliations': [{'raw_affiliation_string': 'Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA', 'institution_ids': ['https://openalex.org/I61641377']}]}, {'author_position': 'middle', 'author': {'id': 'https://openalex.org/A5063926764', 'display_name': 'Lucia Dumitriu', 'orcid': None}, 'institutions': [{'id': 'https://openalex.org/I61641377', 'display_name': 'Universitatea Națională de Știință și Tehnologie Politehnica București', 'ror': 'https://ror.org/0558j5q12', 'country_code': 'RO', 'type': 'education', 'lineage': ['https://openalex.org/I61641377']}], 'countries': ['RO'], 'is_corresponding': False, 'raw_author_name': 'L. Dumitriu', 'raw_affiliation_strings': ['Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA'], 'affiliations': [{'raw_affiliation_string': 'Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA', 'institution_ids': ['https://openalex.org/I61641377']}]}, {'author_position': 'last', 'author': {'id': 'https://openalex.org/A5103543217', 'display_name': 'Lucian Mandache', 'orcid': None}, 'institutions': [{'id': 'https://openalex.org/I61641377', 'display_name': 'Universitatea Națională de Știință și Tehnologie Politehnica București', 'ror': 'https://ror.org/0558j5q12', 'country_code': 'RO', 'type': 'education', 'lineage': ['https://openalex.org/I61641377']}], 'countries': ['RO'], 'is_corresponding': False, 'raw_author_name': 'L. Mandache', 'raw_affiliation_strings': ['Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA'], 'affiliations': [{'raw_affiliation_string': 'Electrical Engineering Department, "Politehnica" University of Bucharest, Bucharest, ROMANIA', 'institution_ids': ['https://openalex.org/I61641377']}]}], 'institution_assertions': [], 'countries_distinct_count': 1, 'institutions_distinct_count': 1, 'corresponding_author_ids': [], 'corresponding_institution_ids': [], 'apc_list': None, 'apc_paid': None, 'fwci': 0.327, 'has_fulltext': True, 'fulltext_origin': 'ngrams', 'cited_by_count': 1, 'citation_normalized_percentile': {'value': 0.293311, 'is_in_top_1_percent': False, 'is_in_top_10_percent': False}, 'cited_by_percentile_year': {'min': 61, 'max': 68}, 'biblio': {'volume': '2', 'issue': None, 'first_page': '353', 'last_page': '356'}, 'is_retracted': False, 'is_paratext': False, 'primary_topic': {'id': 'https://openalex.org/T11522', 'display_name': 'VLSI and FPGA Design Techniques', 'score': 0.998, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, 'topics': [{'id': 'https://openalex.org/T11522', 'display_name': 'VLSI and FPGA Design Techniques', 'score': 0.998, 'subfield': {'id': 'https://openalex.org/subfields/2208', 'display_name': 'Electrical and Electronic Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}, {'id': 'https://openalex.org/T11236', 'display_name': 'Control Systems and Identification', 'score': 0.9978, 'subfield': {'id': 'https://openalex.org/subfields/2207', 'display_name': 'Control and Systems Engineering'}, 'field': {'id': 'https://openalex.org/fields/22', 'display_name': 'Engineering'}, 'domain': {'id': 'https://openalex.org/domains/3', 'display_name': 'Physical Sciences'}}], 'keywords': [{'id': 'https://openalex.org/keywords/symbolic-data-analysis', 'display_name': 'Symbolic data analysis', 'score': 0.7726694}, {'id': 'https://openalex.org/keywords/symbolic-trajectory-evaluation', 'display_name': 'Symbolic trajectory evaluation', 'score': 0.5800712}, {'id': 'https://openalex.org/keywords/modified-nodal-analysis', 'display_name': 'Modified nodal analysis', 'score': 0.56022304}, {'id': 'https://openalex.org/keywords/network-analysis', 'display_name': 'Network Analysis', 'score': 0.5411505}, {'id': 'https://openalex.org/keywords/analogue-electronics', 'display_name': 'Analogue electronics', 'score': 0.5344286}, {'id': 'https://openalex.org/keywords/nodal-analysis', 'display_name': 'Nodal analysis', 'score': 0.41508222}], 'concepts': [{'id': 'https://openalex.org/C65620979', 'wikidata': 'https://www.wikidata.org/wiki/Q7661176', 'display_name': 'Symbolic data analysis', 'level': 2, 'score': 0.7726694}, {'id': 'https://openalex.org/C41008148', 'wikidata': 'https://www.wikidata.org/wiki/Q21198', 'display_name': 'Computer science', 'level': 0, 'score': 0.66102785}, {'id': 'https://openalex.org/C23123167', 'wikidata': 'https://www.wikidata.org/wiki/Q7661193', 'display_name': 'Symbolic trajectory evaluation', 'level': 3, 'score': 0.5800712}, {'id': 'https://openalex.org/C60643732', 'wikidata': 'https://www.wikidata.org/wiki/Q6889414', 'display_name': 'Modified nodal analysis', 'level': 3, 'score': 0.56022304}, {'id': 'https://openalex.org/C134146338', 'wikidata': 'https://www.wikidata.org/wiki/Q1815901', 'display_name': 'Electronic circuit', 'level': 2, 'score': 0.54408896}, {'id': 'https://openalex.org/C32946077', 'wikidata': 'https://www.wikidata.org/wiki/Q618079', 'display_name': 'Network analysis', 'level': 2, 'score': 0.5411505}, {'id': 'https://openalex.org/C29074008', 'wikidata': 'https://www.wikidata.org/wiki/Q174925', 'display_name': 'Analogue electronics', 'level': 3, 'score': 0.5344286}, {'id': 'https://openalex.org/C158622935', 'wikidata': 'https://www.wikidata.org/wiki/Q660848', 'display_name': 'Nonlinear system', 'level': 2, 'score': 0.5315599}, {'id': 'https://openalex.org/C2780586882', 'wikidata': 'https://www.wikidata.org/wiki/Q7520643', 'display_name': 'Simple (philosophy)', 'level': 2, 'score': 0.49689916}, {'id': 'https://openalex.org/C194571574', 'wikidata': 'https://www.wikidata.org/wiki/Q2251187', 'display_name': 'Linear circuit', 'level': 4, 'score': 0.49381432}, {'id': 'https://openalex.org/C81299745', 'wikidata': 'https://www.wikidata.org/wiki/Q334269', 'display_name': 'Transfer function', 'level': 2, 'score': 0.47339618}, {'id': 'https://openalex.org/C11413529', 'wikidata': 'https://www.wikidata.org/wiki/Q8366', 'display_name': 'Algorithm', 'level': 1, 'score': 0.4232932}, {'id': 'https://openalex.org/C105473148', 'wikidata': 'https://www.wikidata.org/wiki/Q1203451', 'display_name': 'Nodal analysis', 'level': 2, 'score': 0.41508222}, {'id': 'https://openalex.org/C80444323', 'wikidata': 'https://www.wikidata.org/wiki/Q2878974', 'display_name': 'Theoretical computer science', 'level': 1, 'score': 0.3558169}, {'id': 'https://openalex.org/C23572009', 'wikidata': 'https://www.wikidata.org/wiki/Q964981', 'display_name': 'Equivalent circuit', 'level': 3, 'score': 0.29620814}, {'id': 'https://openalex.org/C24326235', 'wikidata': 'https://www.wikidata.org/wiki/Q126095', 'display_name': 'Electronic engineering', 'level': 1, 'score': 0.22715408}, {'id': 'https://openalex.org/C83330619', 'wikidata': 'https://www.wikidata.org/wiki/Q21124872', 'display_name': 'NODAL', 'level': 2, 'score': 0.14170575}, {'id': 'https://openalex.org/C119599485', 'wikidata': 'https://www.wikidata.org/wiki/Q43035', 'display_name': 'Electrical engineering', 'level': 1, 'score': 0.09090671}, {'id': 'https://openalex.org/C71924100', 'wikidata': 'https://www.wikidata.org/wiki/Q11190', 'display_name': 'Medicine', 'level': 0, 'score': 0.0}, {'id': 'https://openalex.org/C138885662', 'wikidata': 'https://www.wikidata.org/wiki/Q5891', 'display_name': 'Philosophy', 'level': 0, 'score': 0.0}, {'id': 'https://openalex.org/C121332964', 'wikidata': 'https://www.wikidata.org/wiki/Q413', 'display_name': 'Physics', 'level': 0, 'score': 0.0}, {'id': 'https://openalex.org/C111472728', 'wikidata': 'https://www.wikidata.org/wiki/Q9471', 'display_name': 'Epistemology', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C62520636', 'wikidata': 'https://www.wikidata.org/wiki/Q944', 'display_name': 'Quantum mechanics', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C165801399', 'wikidata': 'https://www.wikidata.org/wiki/Q25428', 'display_name': 'Voltage', 'level': 2, 'score': 0.0}, {'id': 'https://openalex.org/C110251889', 'wikidata': 'https://www.wikidata.org/wiki/Q1569697', 'display_name': 'Model checking', 'level': 2, 'score': 0.0}, {'id': 'https://openalex.org/C105702510', 'wikidata': 'https://www.wikidata.org/wiki/Q514', 'display_name': 'Anatomy', 'level': 1, 'score': 0.0}, {'id': 'https://openalex.org/C127413603', 'wikidata': 'https://www.wikidata.org/wiki/Q11023', 'display_name': 'Engineering', 'level': 0, 'score': 0.0}], 'mesh': [], 'locations_count': 1, 'locations': [{'is_oa': False, 'landing_page_url': 'https://doi.org/10.1109/scs.2003.1227062', 'pdf_url': None, 'source': None, 'license': None, 'license_id': None, 'version': None, 'is_accepted': False, 'is_published': False}], 'best_oa_location': None, 'sustainable_development_goals': [], 'grants': [], 'datasets': [], 'versions': [], 'referenced_works_count': 8, 'referenced_works': ['https://openalex.org/W1548102932', 'https://openalex.org/W2014397380', 'https://openalex.org/W2139030761', 'https://openalex.org/W2165961247', 'https://openalex.org/W2476087443', 'https://openalex.org/W3145363696', 'https://openalex.org/W4236849951', 'https://openalex.org/W4285719527'], 'related_works': ['https://openalex.org/W90809164', 'https://openalex.org/W2757243973', 'https://openalex.org/W2736010003', 'https://openalex.org/W2443453557', 'https://openalex.org/W2427779705', 'https://openalex.org/W2221412762', 'https://openalex.org/W2116435933', 'https://openalex.org/W2095114068', 'https://openalex.org/W2067189296', 'https://openalex.org/W1523339347'], 'abstract_inverted_index': {'The': [0, 22, 82], 'paper': [1], 'presents': [2], 'a': [3, 45, 49, 69, 96, 101, 108], 'new': [4], 'version': [5], 'of': [6, 14, 48, 58, 77, 107, 112], 'the': [7, 15, 27, 35, 55, 59, 63, 74, 78, 89], 'modified': [8], 'nodal': [9], 'method': [10, 23, 72], 'for': [11, 30, 44, 73, 104], 'dynamic': [12, 90], 'analysis': [13, 106], 'linear': [16], 'and/or': [17], 'nonlinear': [18], 'large-scale': [19], 'analog': [20, 113], 'circuits.': [21, 114], 'is': [24, 66], 'based': [25], 'on': [26], 'semistate': [28, 36], 'equations': [29, 57, 92], 'circuit': [31, 60], 'description.': [32], 'In': [33, 62], 'essence': [34], 'encompasses': [37], 'those': [38], 'variables': [39], 'which': [40, 99], 'are': [41], 'most': [42], 'convenient': [43], 'first': [46], 'description': [47], 'circuit,': [50], 'using': [51], 'KCL,': [52], 'KVL,': [53], 'and': [54, 86], 'constitutive': [56], 'elements.': [61], 'paper,': [64], 'it': [65], 'also': [67], 'presented': [68], 'very': [70, 109], 'simple': [71], 'symbolic': [75, 105], 'generation': [76], 'transfer': [79], 'function': [80], 'matrix.': [81], 'algorithm': [83], 'to': [84, 87], 'formulate': [85], 'solve': [88], 'modified-nodal': [91], 'was': [93], 'implemented': [94], 'in': [95], 'computer': [97], 'program,': [98], 'constitutes': [100], 'useful': [102], 'tool': [103], 'large': [110], 'class': [111]}, 'cited_by_api_url': 'https://api.openalex.org/works?filter=cites:W1523339347', 'counts_by_year': [], 'updated_date': '2024-12-12T10:52:59.936390', 'created_date': '2016-06-24'}