Title: Design and Implementation of High-Speed Data Transmission Scheme Between FPGA Boards Based on Virtex ‐7 Series
Abstract: In large-scale ASIC or engineering design, the resources of a piece of FPGA are limited. Developers often need multiple FPGA collaborative work, which involves data transmission between multiple blocks of FPGA. In this paper, we design three data transmission schemes according to the size of the data and the speed of the data. That is the data transmission scheme based on LVDS interface, the high-speed data transmission scheme based on Aurora protocol and the highspeed data transmission scheme of Aurora protocol based on DDR3 SDRAM. Each scheme is introduced from the principle analysis, the state machine design and the result presentation. These three methods have been verified and used, which can basically achieve the requirement of data transmission within FPGA.
Publication Year: 2018
Publication Date: 2018-05-01
Language: en
Type: article
Indexed In: ['crossref']
Access and Citation
Cited By Count: 4
AI Researcher Chatbot
Get quick answers to your questions about the article from our AI researcher chatbot