Title: FPGA verification technology based on SynoTPys VMM
Abstract: Field Programmable Gate Array(FPGA)designs should be thoroughly verified in order to enhance the reliability of corresponding product,with the emerging importance of programmable device in the field of implementation of digital system.The authors analyzed the methods for quality hardware design implemented on FPGA,depicted the trends of verification in terms of method and methodology,as well as conducted a comparison of mainstream verification methodologies.Based on SynoTPys Verification Methodology Manual(VMM),the authors proposed and implemented a layered general-purpose verification technique that has been utilized to construct verification platform in application.The experimental results show that this technique can not only maintain the generability of platform but also improve the efficiency of verification.
Publication Year: 2009
Publication Date: 2009-01-01
Language: en
Type: article
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